OPT9221_15 Datasheet, PDF (3/104 Pages) Texas Instruments – OPT9221 Time-of-Flight Controller

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5 Pin Configuration and Functions
OPT9221
SBAS703A – JUNE 2015 – REVISED JUNE 2015
ZVM Package
256-Ball NFBGA
Top View
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A
VCCIO8
GPO_3
GPO_2
GPO_0
TIC_DATA_7
RSVD
VD_IN
RSVD_IN
RSVD_IN
VD_QD
HD_QD
VD_SF
VD_FR
SENSOR_DEMOD
_CLK
VSYNC_OUT
VCCIO7
B
SLEEP
GND
GPO_1
RSVD
RSVD
RSVD
TIC_DATA_4
RSVD_IN
RSVD_IN
RSVD
RSVD
RSVD
RSVD
SENSOR_CLK
GND
ILLUM_FB
C
TIC_DATA_1/A
SDO
RESETZ
RSVD
VCCIO8
GND
RSVD
VCCIO8
I2C_MAS_SDA
I2C_SDA_SENS
OR
VCCIO7
RSVD
GND
VCCIO7
RSVD
ILLUM_SW_2
ILLUM_SW_1
D
DEBUG
TIC_CSOZ
RSVD
VCCD_PLL3
RSVD
RSVD
GND
I2C_MAS_SCL
I2C_SCL_SENS
OR
GND
RSVD
RSVD
VCCD_PLL2
SENSOR_RSTZ
RSVD
RSVD
E
SYSCLK_IN
GND
VCCIO1
GND
GNDA3
TIC_DATA_6
TIC_DATA_5
TIC_DATA_2
GPI_1
RSVD
RSVD
GNDA2
GND
VCCIO6
ILLUM_MOD_FB
COMP_MOD_FB
F
I2C_SLV_SCL
I2C_SLV_SDA
RSVD
TIC_STATUSZ
VCCA3
GND
VCCINT
TIC_DATA_3
GPI_0
GND
VCCINT
VCCA2
ILLUM_REF
RSVD
IO_MOD_REF
COMP_MOD_REF
G
RSVD
INT_OUT
VCCIO1
GND
INT_PMIC
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
RSVD
BOOT_2
GND
VCCIO6
RSVD
TIC_INIT_DON
E
H
TIC_CLK
TIC_DATA_0
TIC_C
TIC_I
TIC_CONFIGZ
VCCINT
GND
GND
GND
GND
VCCINT
BOOT_1
BOOT_0
TIC_CONF_DON
E
GND
GND
J
RSVD
HD/BD
TIC_CEZ
TIC_O
TIC_S
VCCINT
GND
GND
GND
GND
GND
RSVD
RSVD
RSVD
CAP_DATA_SUM
_P
CAP_DATA_SUM
_M
K
VD
PHASE_AUX
VCCIO2
GND
OP_CLK
OP_CS
VCCINT
GND
DDR2_ADDR_3
DDR2_ADDR_2
VCCINT
RSVD
GND
VCCIO5
CAP_DATA_DIF
F_1P
CAP_DATA_DIF
F_1M
L
OP_DATA_5
OP_DATA_6
OVERFLOW
OP_DATA_7
VCCA1
FE
DDR2_DQ_0
DDR2_DQ_7
DDR2_ADDR_1
DDR2_ADDR_6
DDR2_ADDR_0
VCCA4
RSVD
RSVD_IN
RSVD_IN
RSVD
M
READY
RSVD_IN
VCCIO2
GND
GNDA1
RSVD
DDR2_DQS_0
DDR2_DM_1
DDR2_ADDR_5
DDR2_ADDR_11
DDR2_ADDR_4
GNDA4
GND
VCCIO5
CAP_BIT_CLKP
CAP_BIT_CLKM
N
OP_DATA_3
OP_DATA_4
DDR2_ADDR_10
VCCD_PLL1
DDR2_DQ_1
DDR2_DQ_3
GND
DDR2_DQ_14
DDR2_DQ_9
GND
DDR2_ADDR_8
DDR2_REF_3
VCCD_PLL4
RSVD
CAP_DATA_DIF
F_0P
CAP_DATA_DIF
F_0M
P
OP_DATA_1
OP_DATA_2
DDR2_DM_0
VCCIO3
GND
DDR2_REF_1
VCCIO3
DDR2_DQ_12
DDR2_ADDR_9
VCCIO4
DDR2_REF_2
GND
VCCIO4
DDR2_CLKz_0
RSVD
CAP_FRM_CLKM
R
OP_DATA_0
GND
DDR2_DQ_6
DDR2_BA_0
DDR2_DQ_4
DDR2_DQ_2
DDR2_DQ_5
RSVD_IN
RSVD_IN
DDR2_DQ_11
DDR2_DQ_10
DDR2_DQ_8
DDR2_CSZ
DDR2_CLK_0
GND
CAP_FRM_CLKP
T
VCCIO3
DDR2_CKE
DDR2_REF_0
DDR2_BA_1
DDR2_ADDR_12
DDR2_ADDR_7
DDR2_DQS_1
RSVD_IN
RSVD_IN
DDR2_WEZ
DDR2_CASZ
DDR2_RASZ
DDR2_DQ_15
DDR2_DQ_13
DDR2_ODT_0
VCCIO4
PIN
NAME
BOOT_0
BOOT_1
BOOT_2
Pin Functions
NO.
I/O
I/O
STANDARD
I/O BANK
DESCRIPTION
H13
Input
2.5 V
–
Boot configuration pin 0. Tie to VCC or to GND.
H12
Input
2.5 V
–
Boot configuration pin 1. Tie to VCC or to GND.
G12
Input
2.5 V
–
Boot configuration pin 2. Tie to VCC or to GND.
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