MSP58C20 Datasheet, PDF (3/17 Pages) Texas Instruments – AUDIO-BAND CONVERTER

MSP58C20
AUDIO-BAND CONVERTER
TERMINAL
A/D
NAME NO.
ADCLK
14
D
ADOUT
8
D
AIM
5
A
AIP
4
A
AOM
AOP
DIGL
DIGS
PWAD
PWDA
VSUB
VDD
VSS
17
A
18
A
15
D
16
D
6
D
7
D
1
n/a
13 n/a
3
n/a
Terminal Functions
SPSS015B – DECEMBER 1993 – REVISED JULY 1996
I/O
DESCRIPTION
I ADCLK is a 1.024-MHz clock input.
O ADOUT is the 1-bit output of the ADC modulator and is sampled at 1.024 MHz.
I AIM is a negative differential input for the ADC. AIP and AIM together form a balanced differential input.
The biasing of this terminal is fixed through resistors by the internal common-mode voltage source. This
terminal can be ac coupled or dc coupled. If the terminal is dc coupled, external common-mode bias
should satisfy recommended operating conditions.
I AIP is a positive differential input for the ADC. AIP and AIM together form a balanced differential input.
The biasing of this terminal is fixed through resistors by the internal common-mode voltage source. This
terminal can be ac coupled or dc coupled. If the terminal is dc coupled, external common-mode bias
should satisfy recommended operating conditions.
O AOM is a negative differential DAC output. AOP and AOM together form a balanced differential output.
The common-mode voltage at this terminal is fixed by the internal common-mode circuitry.
O AOP is a positive differential DAC output. AOP and AOM together form a balanced differential output.
The common-mode voltage at this terminal is fixed by the internal common-mode circuitry.
I DIGL is the input level bit of the DAC and is sampled at 0.512 MHz.
I DIGS is the input sign bit of the DAC and is sampled at 0.512 MHz.
I When PWAD is high, it puts the ADC part of the circuit into a power-down mode. When both PWAD and
PWDA are high, the MSP58C20 is in a stable low-power-consumption state.
I When PWDA is high, it puts the DAC part of the circuit in a power-down mode. When both PWAD and
PWDA are high, the MSP58C20 is in a stable low-power-consumption state.
n/a VSUB and VSS must be connected together to minimize substrate currents during power up, power down,
and normal operation.
n/a VDD is the 5-V power supply.
n/a VSS is ground. The internal band-gap voltage and the common-mode bias voltages are referenced to
VSS.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)^†
Supply voltage range, V_DD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6 V
Input voltage range, V_I (any digital or analog input, see Note 1) . . . . . . . . . . . . . . . . . . – 0.3 V to V_DD + 0.3 V
V_SUB, V_SS voltage range, relative to each other . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mV to 30 mV
Operating free-air temperature range, T_A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† _{Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and}
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to VSS unless otherwise noted.
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