MSP430F1101A Datasheet, PDF (3/39 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430C11x1, MSP430F11x1A
MIXED SIGNAL MICROCONTROLLER
SLAS241H − SEPTEMBER 1999 − REVISED SEPTEMBER 2004
Terminal Functions
NAME
P1.0/TACLK
P1.1/TA0
TERMINAL
DW, PW, or DGV
NO.
13
14
RGE
NO.
13
14
P1.2/TA1
15
15
P1.3/TA2
16
16
P1.4/SMCLK/TCK
17
17
P1.5/TA0/TMS
18
18
P1.6/TA1/TDI/TCLK
19
20
P1.7/TA2/TDO/TDI†
20
21
P2.0/ACLK
8
6
P2.1/INCLK
9
7
P2.2/CAOUT/TA0
10
8
P2.3/CA0/TA1
11
10
P2.4/CA1/TA2
12
11
P2.5/ROSC
3
24
RST/NMI
TEST
7
5
1
22
VCC
VSS
XIN
2
23
4
2
6
4
XOUT
5
3
QFN Pad
NA
Package Pad
† _{TDO or TDI is selected via JTAG instruction.}
DESCRIPTION
I/O
I/O General-purpose digital I/O pin/Timer_A, clock signal TACLK input
I/O General-purpose digital I/O pin/Timer_A, capture: CCI0A input,
compare: Out0 output/BSL transmit
I/O General-purpose digital I/O pin/Timer_A, capture: CCI1A input,
compare: Out1 output
I/O General-purpose digital I/O pin/Timer_A, capture: CCI2A input,
compare: Out2 output
I/O General-purpose digital I/O pin/SMCLK signal output/test clock, input
terminal for device programming and test
I/O General-purpose digital I/O pin/Timer_A, compare: Out0 output/test
mode select, input terminal for device programming and test
I/O General-purpose digital I/O pin/Timer_A, compare: Out1 output/test
data input or test clock input
I/O General-purpose digital I/O pin/Timer_A, compare: Out2 output/test
data output terminal or data input during programming
I/O General-purpose digital I/O pin/ACLK output
I/O General-purpose digital I/O pin/Timer_A, clock signal at INCLK
I/O General-purpose digital I/O pin/Timer_A, capture: CCI0B input/
comparator_A, output/BSL receive
I/O General-purpose digital I/O pin/Timer_A, compare: Out1 output/
comparator_A, input
I/O General-purpose digital I/O pin/Timer_A, compare: Out2 output/
comparator_A, input
I/O General-purpose digital I/O pin/input for external resistor that defines
the DCO nominal frequency
I Reset or nonmaskable interrupt input
I Selects test mode for JTAG pins on Port1. The device protection fuse
is connected to TEST.
Supply voltage
Ground reference
I Input terminal of crystal oscillator
O Output terminal of crystal oscillator
NA QFN package pad connection to VSS recommended.
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