LP2989_15 Datasheet, PDF (3/34 Pages) Texas Instruments – LP2989 Micropower and Low-Noise, 500-mA Ultra Low-Dropout Regulator for Use With Ceramic Output Capacitors

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5 Pin Configuration and Functions
D/DGK Packages
8-Pin SOIC and VSSOP
Top View
LP2989
SNVS083O – FEBRUARY 2005 – REVISED MARCH 2015
NGN Package
8-Lead WSON
Top View
PIN
NAME
NO.
BYPASS
1
ERROR
7
GROUND
3
INPUT
4
N/C
2
OUTPUT
5
SENSE
6
SHUTDOWN
8
Thermal Pad
—
Pin Functions
I/O
DESCRIPTION
I
Bypass capacitor input
O
Error signal output
—
GND
I
Regulator power input
DO NOT CONNECT. Device pin 2 is reserved for post packaging test and calibration of the
LP2989 V_OUT accuracy. Device pin 2 must be left floating. Do not connect to any potential.
—
Do not connect to ground. Any attempt to do pin continuity testing on device pin 2 is
discouraged. Continuity test results will be variable depending on the actions of the factory
calibration. Aggressive pin continuity testing (high voltage, or high current) on device pin 2
may activate the trim circuitry forcing V_OUT to move out of tolerance.
O
Regulated output voltage
I
Feedback voltage sense input
I
Shutdown input
The exposed thermal pad on the bottom of the WSON package should be connected to a
copper thermal pad on the PCB under the package. The use of thermal vias to remove heat
from the package into the PCB is recommended. Connect the thermal pad to ground
—
potential or leave floating. Do not connect the thermal pad to any potential other than the
same ground potential seen at device pin 3. For additional information on using TI's Non Pull
Back WSON package, see Application Note AN-1187 Leadless Leadframe Package (LLP)
(SNOA401).
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