English
Language : 

DRV8812_15 Datasheet, PDF (3/22 Pages) Texas Instruments – DUAL-BRIDGE MOTOR CONTROLLER IC
DRV8812
www.ti.com
SLVS997F – OCTOBER 2009 – REVISED AUGUST 2013
Table 1. TERMINAL FUNCTIONS
NAME
PIN
PWP
RHD
POWER AND GROUND
GND
14, 28
3, 17
VMA
4
7
VMB
11
14
V3P3OUT
15
18
CP1
1
4
CP2
2
5
VCP
3
6
CONTROL
AENBL
21
24
APHASE
20
23
AI0
24
27
AI1
25
28
BENBL
22
25
BPHASE
23
26
BI0
26
1
BI1
27
2
DECAY
19
22
nRESET
16
19
nSLEEP
AVREF
17
20
12
15
BVREF
13
16
STATUS
nFAULT
OUTPUT
ISENA
ISENB
AOUT1
AOUT2
BOUT1
BOUT2
18
21
6
9
9
12
5
8
7
10
10
13
8
11
I/O (1)
DESCRIPTION
-
Device ground
-
Bridge A power supply
-
Bridge B power supply
O
3.3-V regulator output
IO
Charge pump flying capacitor
IO
Charge pump flying capacitor
IO
High-side gate drive voltage
I
Bridge A enable
I
Bridge A phase (direction)
I
Bridge A current set
I
I
Bridge B enable
I
Bridge B phase (direction)
I
Bridge B current set
I
I
Decay mode
I
Reset input
I
Sleep mode input
I
Bridge A current set reference input
I
Bridge B current set reference input
OD Fault
IO
Bridge A ground / Isense
IO
Bridge B ground / Isense
O
Bridge A output 1
O
Bridge A output 2
O
Bridge B output 1
O
Bridge B output 2
EXTERNAL COMPONENTS
OR CONNECTIONS
Connect to motor supply (8 - 45 V). Both pins
must be connected to same supply.
Bypass to GND with a 0.47-μF 6.3-V ceramic
capacitor. Can be used to supply VREF.
Connect a 0.01-μF 50-V capacitor between
CP1 and CP2.
Connect a 0.1-μF 16-V ceramic capacitor and
a 1-MΩ resistor to VM.
Logic high to enable bridge A
Logic high sets AOUT1 high, AOUT2 low
Sets bridge A current: 00 = 100%,
01 = 71%, 10 = 38%, 11 = 0
Logic high to enable bridge B
Logic high sets BOUT1 high, BOUT2 low
Sets bridge B current: 00 = 100%,
01 = 71%, 10 = 38%, 11 = 0
Low = slow decay, open = mixed decay,
high = fast decay
Active-low reset input initializes internal logic
and disables the H-bridge outputs
Logic high to enable device, logic low to enter
low-power sleep mode
Reference voltage for winding current set.
Can be driven individually with an external
DAC for microstepping, or tied to a reference
(e.g., V3P3OUT). A 0.01-µF bypass capacitor
to GND is recommended.
Logic low when in fault condition (overtemp,
overcurrent)
Connect to current sense resistor for bridge A
Connect to current sense resistor for bridge B
Connect to motor winding A
Connect to motor winding B
(1) Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output
Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: DRV8812
Submit Documentation Feedback
3