CYBUS3384 Datasheet, PDF (3/11 Pages) Texas Instruments – Dual 5-Bit Bus Switch

CYBUS3384
Capacitance^[6]
Parameter
C_IN
C_OUT
Description
Input Capacitance
Output Capacitance
Typ.^[4]
3
7
Max.
4
8
Unit
pF
pF
Power Supply Characteristics
Parameter
Description
I_CC
Quiescent Power Supply Current
∆I_CC
I_CCD
I_C
Quiescent Power Supply Current
(Input HIGH)^[9]
Dynamic Power Supply Current^[10]
Total Power Supply Current^{[11, 12]}
Test Conditions^[8]
V_CC=Max., V_IN≤GND or V_CC, f=0
3384
3L384
V_CC=Max., V_IN=3.4V, f=0, Per Control Input
Typ.^[4]
0.2
0.2
V_CC=Max., Control Input Toggling,
@ 50% Duty Cycle, A & B Pins Open
V_CC=Max.,
Two Control Inputs Toggling, @ 50%
Duty Cycle, f₁=10 MHz, V_IN=3.4V
3384
3L384
Max.
3.0
3.0
2.0
0.12
4.4
4.4
Unit
µA
µA
mA
mA/
MHz
mA
mA
Switching Characteristics Over the Operating Range^[13]
Commercial
Parameter
Description
Min.
Max.
Unit
t_PLH
t_PHL
Propagation Delay
A to B^{[14, 15]}
.25
ns
t_PZH
t_PZL
Switch Turn On Delay,
BE₁, BE₂ to A, B^[13]
1.5
6.5
ns
t_PHZ
t_PHZ
|Q_ci|
Switch Turn Off Delay,
BE₁, BE₂ to A, B^{[13, 14]}
Charge Injection, Typical^{[16, 17]}
1.5
5.5
ns
1.5
pC
Notes:
8. For conditions shown as MIN or MAX use the appropriate values specified under DC specifications.
9. Per TTL driven input (V_IN=3.4V); A and B pins do not contribute to I_CC. All other inputs at V_CC or GND.
10. This current applies to the control inputs only and represents the current required to switch internal capacitance at the specified frequency. The A and B inputs
generate no significant AC or DC currents as they transition. This parameter is not tested but is specified by design.
11. I_C = I_QUIESCENT + I_INPUTS + I_DYNAMIC
I_C = I_CC+∆I_CCD_HN_T+I_CCD(f₀/2 + f₁N₁)
I_CC = Quiescent Current with CMOS input levels
∆I_CC = Power Supply Current for a TTL HIGH input (V_IN=3.4V)
D_H = Duty Cycle for TTL inputs HIGH
N_T = Number of TTL inputs at D_H
I_CCD = Dynamic Current caused by an input transition pair (HLH or LHL)
f₀ = Clock frequency for registered devices, otherwise zero
f₁ = Input signal frequency
N₁ = Number of inputs changing at f₁
12. Note that activity on A or B inputs do not contribute to I_C. The switches merely connect and pass through activity on these pins.
13. See Test Circuit and Waveform. Minimum limits are specified but not tested.
14. This parameter is specified by design but not tested.
15. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant for
the switch is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay of the bus
switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
16. Measured at switch turn off, A to C, load=50 pF in parallel with 10 meg scope probe, V_IN at A=0.0V.
17. Tested initially and after any design change which may affect this parameter.
3