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BQ24105-Q1 Datasheet, PDF (3/35 Pages) Texas Instruments – SYNCHRONOUS SWITCHMODE, LI-ION AND LI-POLYMER CHARGE-MANAGEMENT IC WITH INTEGRATED POWER FETs ( bqSWITCHER™)
bq24105-Q1
www.ti.com................................................................................................................................................................................................. SLUS953 – AUGUST 2009
ELECTRICAL CHARACTERISTICS (continued)
TJ = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
VCC > VCC(min), PWM switching
10
I(VCC)
VCC supply current
VCC > VCC(min), PWM NOT switching
VCC > VCC(min), CE = HIGH
0°C ≤ TJ ≤ 65°C, VI(BAT) = 4.2 V,
VCC < V(SLP) or VCC > V(SLP) but not in charge
I(SLP)
Battery discharge sleep current, (SNS,
BAT, OUT, FB pins)
0°C ≤ TJ ≤ 65°C, VI(BAT) = 8.4 V,
VCC < V(SLP) or VCC > V(SLP) but not in charge
0°C ≤ TJ ≤ 65°C, VI(BAT) = 12.6 V,
VCC < V(SLP) or VCC > V(SLP) but not in charge
Voltage Regulation
VIBAT
Feedback regulation REF for bq24105
(W/FB)
IIBAT = 25 nA typical into pin
2.1
Voltage regulation accuracy
TA = 25°C
–0.5%
–1%
Current Regulation - Fast Charge
IOCHARGE Output current range of converter
VLOWV ≤ VI(BAT) < VOREG,
V(VCC) - VI(BAT) > V(DO-MAX)
150
100 mV ≤ VIREG≤ 200 mV,
MAX
5
315
3.5
5.5
7.7
UNIT
mA
µA
µA
V
0.5%
1%
2000
mA
VIREG
Voltage regulated across R(SNS) Accuracy
V(ISET1)
Output current set voltage
K(ISET1)
Output current set factor
Precharge and Short-Circuit Current Regulation
VLOWV
Precharge to fast-charge transition voltage
threshold, BAT,
bq24100/03/03A/04/05/08/09 ICs only
t
Deglitch time for precharge to fast charge
transition,
IOPRECHG
V(ISET2)
K(ISET2)
Precharge range
Precharge set voltage, ISET2
Precharge current set factor
VIREG
+
1V
RSET1
1000,
Programmed Where
5 kΩ ≤ RSET1 ≤ 10 kΩ, Select RSET1 to
program VIREG,
VIREG(measured) = IOCHARGE + RSNS
(–10% to 10% excludes errors due to RSET1
and R(SNS) tolerances)
V(LOWV) ≤ VI(BAT) ≤ VO(REG),
V(VCC) ≤ VI(BAT) × V(DO-MAX)
VLOWV ≤ VI(BAT) < VO(REG),
V(VCC) ≤ VI(BAT) + V(DO-MAX)
Rising voltage;
tRISE, tFALL = 100 ns, 2-mV overdrive
VI(BAT) < VLOWV, t < tPRECHG
VI(BAT) < VLOWV, t < tPRECHG
100 mV ≤ VIREG-PRE ≤ 100 mV,
–10%
1
1000
68
71.4
20
30
15
100
1000
10%
V
V/A
75 %VO(REG)
40
ms
200
mA
mV
V/A
VIREG*PRE
+
0.1V
RSET2
1000,
VIREG-PRE Voltage regulated across RSNS-Accuracy
Charge Termination (Current Taper) Detection
(PGM) Where
1.2 kΩ ≤ RSET2 ≤ 10 kΩ, Select RSET1
to program VIREG-PRE,
VIREG-PRE (Measured) = IOPRE-CHG × RSNS
(–20% to 20% excludes errors due to RSET1
and RSNS tolerances)
ITERM
VTERM
Charge current termination detection range
Charge termination detection set voltage,
ISET2
VI(BAT) > VRCH
VI(BAT) > VRCH
K(ISET2)
tdg-TERM
Termination current set factor
Charger termination accuracy
Deglitch time for charge termination
VI(BAT) > VRCH
Both rising and falling,
2-mV overdrive tRISE, tFALL = 100 ns
–20%
15
–20%
20
100
1000
30
20%
200
mA
mV
V/A
20%
40
ms
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): bq24105-Q1
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