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| BQ2406X Datasheet, PDF (3/31 Pages) Texas Instruments – 1A SINGLE-CHIP Li-Ion/Li-Pol CHARGE MANAGEMENT IC WITH THERMAL REGULATION | |||
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bq2406x
www.ti.com
SLUS689 â JUNE 2006
ELECTRICAL CHARACTERISTICS
over recommended operating, TJ : 0 â125°C range, See the Application Circuits section, typical values at TJ: 25°C (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
POWER-ON-RESET
V(PDWN)
Power down threshold
V(IN) = 0 V, increase V(OUT): 0 â 3 V OR
V(OUT) = 0 V, increase V(IN): 0 â 3 V,
CE = LO (1)
INPUT POWER DETECTION, CE = HI or LOW, V(IN) > 3.5 V
VIN(DT)
VHYS(INDT)
TDGL(INDT1)
TDGL(NOIN)
Input power detection threshold
V(IN) detected at [V(IN) â V(OUT)] > VIN(DT)
Input power detection hysteresis
Input power not detected at
[V(IN)â V(OUT)] < [VIN(DT)â VHYS(INDT)]
Deglitch time, input power detected PG:HI â LO, Thermal regulation loop not active,
status
RTMR = 50 K⦠or V(TMR) = OPEN
Delay time, input power not detected
status
PG: LO âHI after TDGL(NOIN)
TDLY(CHGOFF) Charger off delay
INPUT OVER-VOLTAGE PROTECTION
Charger turned off after TDLY(CHGOFF), Measured from
PG: LO â HI; Timer reset after TDLY(CHGOFF)
V(OVP)
Input over-voltage detection
threshold
V(IN) increasing
bq24060/61/63/65/66
bq24064
VHYS(OVP)
Input over-voltage hysteresis
V(IN) decreasing
bq24060/61/63/65/66
bq24064
TDGL(OVDET) Input over-voltage detection delay
CE = HI or LO, Measured from V(IN) > V(OVP) to
PG: LO â HI; VIN increasing
TDGL(OVNDET)
Input over-voltage not detected
delay
CE = HI or LO, Measured from V(IN) < V(OVP)
to PG: HI â LO; V(IN) decreasing
QUIESCENT CURRENT
ICC(CHGOFF)
ICC(CHGON)
IBAT(DONE)
IN pin quiescent current, charger off
IN pin quiescent current, charger on
Battery leakage current after
termination into IC
Input power detected,
CE = HI
V(IN) = 6 V
V(IN) = 16.5 V
Input power detected, CE = LO, VBAT = 4.5 V
Input power detected, charge terminated,
CE = LO
IBAT(CHGOFF)
Battery leakage current into IC,
charger off
Input power detected, CE = HI OR
input power not detected, CE = LO
TS PIN COMPARATOR
V(TS1)
Lower voltage temperature
threshold
Hot detected at V(TS) < V(TS1); NTC thermistor
V(TS2)
Upper voltage temperature
threshold
Cold detected at V(TS) > V(TS2); NTC thermistor
VHYS(TS)
CE INPUT
Hysteresis
Temp OK at V(TS) > [ V(TS1) + VHYS(TS) ] OR
V(TS) < [ V(TS2)â VHYS(TS) ]
VIL
Input (low) voltage
V(CE) increasing
VIH
Input (high) voltage
V(CE) decreasing
STAT1, STAT2 AND PG OUTPUTS , V(IN) ⥠VO(REG) + V(DO-MAX)
VOL
Output (low) saturation voltage
Ioutput = 5 mA (sink)
THERMAL SHUTDOWN
T(SHUT)
T(SHUTHYS)
Temperature trip
Thermal hysteresis
Junction temperature
Junction temperature
MIN
1.5
30
1.5
28
6.2
10.2
0.1
0.3
10
10
29
60
0
2.0
TYP MAX UNIT
3.0 V
130 mV
mV
3.5 ms
10 µs
32 ms
6.5 7.0
V
10.5 11.7
0.2
V
0.5
100 µs
100 µs
100 200
µA
300
4
6 mA
1
5 µA
1
5 µA
30 31 %V(IN)
61 62 %V(IN)
2
%V(IN)
1V
V
0.5 V
155
°C
20
°C
(1) Specified by design, not production tested.
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