TPS5401_15 Datasheet, PDF (29/45 Pages) Texas Instruments – TPS5401 0.5-A, 42-V Input, Step-Down SWIFT™ Converter

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TPS5401
SLVSAB0A – DECEMBER 2010 – REVISED NOVEMBER 2014
current and output voltage and adjust the duty cycle to react to the change. The output capacitor must be sized
to supply the extra current to the load until the control loop responds to the load change. The output capacitance
must be large enough to supply the difference in current for two clock cycles while only allowing a tolerable
amount of drop in the output voltage. Equation 20 shows the minimum output capacitance necessary to
accomplish this.
( ) ^COUT
>
f_SW ´
2 ´ DI_OUT
DV_OUT - DI_OUT ´R_ESR
where
• ΔI_OUT is the change in output current
• f_SW is the regulator switching frequency
• ΔV_OUT is the allowable change in the output voltage
• R_ESR is the Equivalent Series Resistance (ESR) of the output capacitor
(20)
Equation 20 indicates the ESR must be less than ΔV_OUT/ΔI_OUT. For this example, the transient load response is
specified as a 4% change in V_OUT for a load step from 0 A (no load) to 0.5 A (full load). In addition, ΔI_OUT = 0.5A
and ΔV_OUT = 0.04 × 5 V = 0.2 V. For ceramic capacitors, the ESR is usually small enough to ignore in this
calculation. Aluminum electrolytic and tantalum capacitors have higher ESR that should be taken into account.
Using these numbers gives a minimum capacitance of 7.14 μF for ceramic capacitor and 20.4 µF for electrolytic
capacitor with 260 mΩ ESR.
The catch diode of the regulator cannot sink current, so any stored energy in the inductor produces an output
voltage overshoot when the load current rapidly decreases. The output capacitor must also be sized to absorb
energy stored in the inductor when transitioning from a high load current to a lower load current. The excess
energy that gets stored in the output capacitor increases the voltage on the capacitor. The capacitor must be
sized to maintain the desired output voltage during these transient periods. Equation 21 is used to calculate the
minimum capacitance to keep the output voltage overshoot to a desired value, where L_OUT is the value of the
inductor, I_OH is the output current under heavy load, I_OL is the output under light load, V_FIN is the final peak output
voltage, and V_INI is the initial capacitor voltage. For this example, the worst-case load step is from 0.5 A to 0 A.
The output voltage increases during this load transition, and the stated maximum in our specification is 4% of the
output voltage. This makes V_FIN = 1.04 × 5 V = 5.2 V. V_INI is the initial capacitor voltage, which is the nominal
output voltage of 5 V. Using these numbers in Equation 21 yields a minimum capacitance of 5.76 μF.
C_OUT
> L_OUT
´
I_OH2 - I_OL2
V_FIN2 - V_INI2
(21)
Equation 22 calculates the minimum output capacitance needed to meet the output-voltage ripple specification,
where f_SW is the switching frequency, V_ORIPPLE is the maximum allowable output voltage ripple, and I_LRIPPLE is the
inductor ripple current. Equation 22 shows the ESR of the output capacitor must be less than V_ORIPPLE/I_LRIPPLE to
meet the output-voltage ripple requirement. Low-ESR capacitors are preferred to keep the output-voltage ripple
low. If a high-ESR electrolytic capacitor is used, a small ESR ceramic capacitor is recommended to be in parallel
with the electrolytic capacitor to minimize the output voltage ripple. In this application, an aluminum electrolytic
capacitor is chosen as the output capacitor. It has 260 mΩ ESR. Equation 22 yields 1.44 µF.
1
1
C_OUT
>
8 ´ f_SW
´
V_ORIPPLE
I_LRIPPLE
- R_ESR
(22)
The most stringent criterion for the output capacitor is 20.5 µF of capacitance to keep the output voltage in
regulation during a load transient in this example.
Additional capacitance de-ratings for aging, temperature and dc bias should be factored in, which increases this
minimum value. For this example, a 220 µF electrolytic capacitor with 260 mΩ of ESR can be used for low cost
target.
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