TPS65250 Datasheet, PDF (28/36 Pages) Texas Instruments – 4.5-V TO 18-V INPUT, HIGH CURRENT, SYNCHRONOUS STEP DOWN THREE BUCK CONVERTER WITH INTEGRATED FET AND DYING GASP STORAGE AND RELEASE CIRCUIT

TPS65250
SLVSAA3 – JUNE 2010
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3.3-V and 6.5 LDO Regulators
The following ceramic capacitor (X7R/X5R) should be connected as close as possible to the described pins:
• 10 µF for V7V pin 28
• 3.3 µF for V3V pin 29
Choice of Converter for Pump Operation And Sequencing Requirement
Figure 41. Pump and Dump Pins
Although any converter can be used to feed the pump circuit buck 3 is the best option that allows for an easy
layout as the input of the pump circuit (BSTG pin 35) is next to its switching node and allows for a short
connection for a trace associated to a high frequency switching node. Connect a 22-nF capacitor in series with a
10-Ω resistor from the LX3 node to the BSTDG pin.
The storage capacitor charges in two stages:
1. When V_IN is applied the capacitor charges in a controlled way to a voltage close to V_IN at a rate of 0.1 ms/µF.
2. Once the capacitor is charged Buck 3 is enabled and its switching node provides the energy to charge the
capacitor to the final storage voltage. Once this voltage is achieved the pump circuit will only provide current
to compensate the self-discharge of the storage capacitor.
Note that it is important that these two charge stages do not overlap. In other words buck 3 must be enabled only
after the first stage of charging is achieved.
Based on these considerations the following sequencing requirement is required:
CONVERTER
Buck 1
Buck 2
Buck 3
V
FUNCTION
3.3 System, SoC
2.5 MEM, I/O, SoC
7.5 Line drivers
Table 4. Sequencing
SEQUENCING
1st supply to start, no delay. EN1 tied to
V3P3.
Simultaneous start with buck 1. EN2 tied
to v3P3.
Enabled by SoC. Must start after storage
capacitor settles t_I ~V_IN.
SOFT START
Use 4.7 nF to achieve SS ~0.5 ms.
Use 3.9 nF to achieve rationometric
start-up with respect to Buck 1.
Use 4.7 nF.
28
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