THS4502 Datasheet, PDF (28/40 Pages) Texas Instruments – WIDEBAND, LOW-DISTORTION FULLY DIFFERENTIAL AMPLIFIERS

THS4502
THS4503
SLOS352D − APRIL 2002 − REVISED JANUARY 2004
N_A: Fully Differential Amplifier; termination = 2R_g
Noise
Source Scale Factor
(e_ni)²
2
ȡ ȣ ^Rg
ȧȢ ȧȤ R_f
)
R_g
R_g
)
R_s
2
(18)
(i_ni)²
(i_ii)²
4kTR_f
R_g2
R_g2
ǒ Ǔ²
2
R_g
R_f
(19)
(20)
(21)
4kTR_g
2
ȡ ȣ ^Rg
ȧȢ ȧȤ ²
R_g
)
R_s
2
(22)
Figure 108. Scaling Factors for Individual Noise
Sources Assuming No termination Resistance is
Used (e.g., R_T is open)
È¡
È£²
ȧȧȧȢ ȧȧȧȤ _{Ni + 4kTRs}
2R_tR_g
R_t)2R_g
R_s)_R2t)^Rt_2RR^g _g
(23)
Figure 109. Input Noise With a Termination
Resistor
ǒ Ǔ²
N_i + 4kTR_s
2R_g
R_s ) 2R_g
(24)
Figure 110. Input Noise Assuming No
Termination Resistor
Noise Factor and Noise Figure Calculations
N_A + S^ǒNoise Source Scale Factor^Ǔ
(25)
F
+
1
)
N_A
N_I
(26)
NF + 10 log (F)
(27)
PRINTED-CIRCUIT BOARD LAYOUT
TECHNIQUES FOR OPTIMAL
PERFORMANCE
Achieving optimum performance with high frequency
amplifier-like devices in the THS4500 family requires
careful attention to board layout parasitic and external
component types.
28
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Recommendations that optimize performance include:
D Minimize parasitic capacitance to any ac ground for all
of the signal I/O pins. Parasitic capacitance on the
output and input pins can cause instability. To reduce
unwanted capacitance, a window around the signal
I/O pins should be opened in all of the ground and
power planes around those pins. Otherwise, ground
and power planes should be unbroken elsewhere on
the board.
D Minimize the distance (< 0.25”) from the power supply
pins to high frequency 0.1-µF decoupling capacitors.
At the device pins, the ground and power plane layout
should not be in close proximity to the signal I/O pins.
Avoid narrow power and ground traces to minimize
inductance between the pins and the decoupling
capacitors. The power supply connections should
always be decoupled with these capacitors. Larger
(6.8 µF or more) tantalum decoupling capacitors,
effective at lower frequency, should also be used on
the main supply pins. These may be placed somewhat
farther from the device and may be shared among
several devices in the same area of the PC board. The
primary goal is to minimize the impedance seen in the
differential-current return paths.
D Careful selection and placement of external
components preserve the high frequency
performance of the THS4500 family. Resistors should
be a very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal-film
and carbon composition, axially-leaded resistors can
also provide good high frequency performance.
Again, keep their leads and PC board trace length as
short as possible. Never use wirewound type resistors
in a high frequency application. Since the output pin
and inverting input pins are the most sensitive to
parasitic capacitance, always position the feedback
and series output resistors, if any, as close as possible
to the inverting input pins and output pins. Other
network components, such as input termination
resistors, should be placed close to the gain-setting
resistors. Even with a low parasitic capacitance
shunting the external resistors, excessively high
resistor values can create significant time constants
that can degrade performance. Good axial metal-film
or surface-mount resistors have approximately 0.2 pF
in shunt with the resistor. For resistor values > 2.0 kΩ,
this parasitic capacitance can add a pole and/or a zero
below 400 MHz that can effect circuit operation. Keep
resistor values as low as possible, consistent with
load driving considerations.
D Connections to other wideband devices on the board
may be made with short direct traces or through
onboard transmission lines. For short connections,
consider the trace and the input to the next device as
a lumped capacitive load. Relatively wide traces