LMK03806 Datasheet, PDF (28/39 Pages) Texas Instruments – Ultra Low Jitter Clock Generator with 14 Programmable Outputs

15.7 REGISTERS R6 TO R8
15.7.1 CLKoutX_TYPE
The clock output types of the LMK03806 are individually pro-
grammable. The CLKoutX_TYPE registers set the output
type of an individual clock output to LVDS, LVPECL, LVC-
MOS, or powers down the output buffer. Note that LVPECL
supports four different amplitude levels and LVCMOS sup-
ports single LVCMOS outputs, inverted, and normal polarity
of each output pin for maximum flexibility.
The programming addresses table shows at what register and
address the specified clock output CLKoutX_TYPE register is
located.
The CLKoutX_TYPE table shows the programming definition
for these registers.
CLKoutX_TYPE Programming Addresses
CLKoutX
Programming Address
CLKout0
R6[19:16]
CLKout1
R6[23:20]
CLKout2
R6[27:24]
CLKout3
R6[31:28]
CLKout4
R7[19:16]
CLKout5
R7[23:20]
CLKout6
R7[27:24]
CLKout7
R7[31:28]
CLKout8
R8[19:16]
CLKout9
R8[23:20]
CLKout10
R8[27:24]
CLKout11
R8[31:28]
CLKoutX_TYPE, 4 bits
R6-R8[31:28, 27:24, 23:20]
Definition
0 (0x00)
Power down
1 (0x01)
LVDS
2 (0x02)
LVPECL (700 mVpp)
3 (0x03)
LVPECL (1200 mVpp)
4 (0x04)
LVPECL (1600 mVpp)
5 (0x05)
LVPECL (2000 mVpp)
6 (0x06)
LVCMOS (Norm/Inv)
7 (0x07)
LVCMOS (Inv/Norm)
8 (0x08) (Note 23)
LVCMOS (Norm/Norm)
9 (0x09) (Note 23)
LVCMOS (Inv/Inv)
10 (0x0A) (Note 23)
LVCMOS (Low/Norm)
11 (0x0A) (Note 23)
LVCMOS (Low/Inv)
12 (0x0C) (Note 23)
LVCMOS (Norm/Low)
13 (0x0D) (Note 23)
LVCMOS (Inv/Low)
14 (0x0E) (Note 23)
LVCMOS (Low/Low)
Note 23: It is recommended to use one of the complementary LVCMOS
modes. Best noise performance is achieved using LVCMOS (Norm/Inv) or
LVCMOS (Inv/Norm) due to the differential switching of the outputs. The next
best performance is achieved using an LVCMOS mode with only one output
on. Finally, LVCMOS (Norm/Norm) or LVCMOS (Inv/Inv) have the create
the most switching noise.
15.8 REGISTER R9
Register 9 contains no user programmable bits, but must be
programmed as described in the register map.
15.9 REGISTER R10
15.9.1 OSCout1_TYPE, LVPECL Output Amplitude
Control
The OSCout1 clock output can only be used as an LVPECL
output type. OSCout1_TYPE sets the LVPECL output ampli-
tude of the OSCout1 clock output.
OSCout1_TYPE, 2 bits
R10[31:30]
Output Format
0 (0x00)
LVPECL (700 mVpp)
1 (0x01)
LVPECL (1200 mVpp)
2 (0x02)
LVPECL (1600 mVpp)
3 (0x03)
LVPECL (2000 mVpp)
15.9.2 OSCout0_TYPE
The OSCout0 clock output has a programmable output type.
The OSCout0_TYPE register sets the output type to LVDS,
LVPECL, LVCMOS, or powers down the output buffer. Note
that LVPECL supports four different amplitude levels and
LVCMOS supports dual and single LVCMOS outputs with in-
verted, and normal polarity of each output pin for maximum
flexibility.
To turn on the output, the OSCout0_TYPE must be set to a
non-power down setting and enabled with Section 15.9.3
EN_OSCoutX, OSCout Output Enable.
OSCout0_TYPE, 4 bits
R10[27:24]
Definition
0 (0x00)
Powerdown
1 (0x01)
LVDS
2 (0x02)
LVPECL (700 mVpp)
3 (0x03)
LVPECL (1200 mVpp)
4 (0x04)
LVPECL (1600 mVpp)
5 (0x05)
LVPECL (2000 mVpp)
6 (0x06)
LVCMOS (Norm/Inv)
7 (0x07)
LVCMOS (Inv/Norm)
8 (0x08) (Note 24)
LVCMOS (Norm/Norm)
9 (0x09) (Note 24)
LVCMOS (Inv/Inv)
10 (0x0A) (Note 24)
LVCMOS (Low/Norm)
11 (0x0B) (Note 24)
LVCMOS (Low/Inv)
12 (0x0C) (Note 24)
LVCMOS (Norm/Low)
13 (0x0D) (Note 24)
LVCMOS (Inv/Low)
14 (0x0E) (Note 24)
LVCMOS (Low/Low)
Note 24: It is recommended to use one of the complementary LVCMOS
modes. Best noise performance is achieved using LVCMOS (Norm/Inv) or
LVCMOS (Inv/Norm) due to the differential switching of the outputs. The next
best performance is achieved using an LVCMOS mode with only one output
on. Finally, LVCMOS (Norm/Norm) or LVCMOS (Inv/Inv) have the create
the most switching noise.
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