OPA2172 Datasheet, PDF (27/42 Pages) Texas Instruments – OPAx172 36-V, Single-Supply, 10-MHz, Rail-to-Rail Output Operational Amplifiers

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OPA172, OPA2172, OPA4172
SBOS618H – DECEMBER 2013 – REVISED SEPTEMBER 2015
9.2.3 JFET-Input Low-Noise Amplifier
Figure 51 shows a low-noise composite amplifier built by adding a low noise JFET pair (Q1 and Q2) as an input
preamplifier for the OPA172. Transistors Q3 and Q4 form a 2-mA current sink that biases each JFET with 1 mA
of drain current. Using 3.9-kΩ drain resistors produces a gain of approximately 10 in the input amplifier, making
the extremely-low, broadband-noise spectral density of the JFET pair, Q1 and Q2, the dominant noise source of
the amplifier. The output impedance of the input differential amplifier is large enough that a FET-input amplifier
such as the OPA172 provides superior noise performance over bipolar-input amplifiers.
The gain of the composite amplifier is given by Equation 3:
A_V = (1 + R3 / R4)
(3)
The resistances shown are standard 1% resistor values that produce a gain of approximately 100 (99.26) with
68° of phase margin. Gains less than 10 may require additional compensation methods to provide stability.
Select low resistor values to minimize the resistor thermal noise contribution to the total output noise.
VCC
VEE
VCC
V1
15 V
V2
15 V
R1
3.9 kŸ
LSK489
R2
3.9 kŸ
VEE
OPA172
++
VCC
VOUT
R3
1.13 kŸ
Q1
Q2
Q3
MMBT4401
R5
300 Ÿ
VCC
R6
27.4 kŸ
Q4
MMBT4401
R4
11.5 Ÿ
VEE
Figure 51. JFET-Input Low-Noise Amplifier
10 Power-Supply Recommendations
The OPA172 is specified for operation from 4.5 V to 36 V (±2.25 V to ±18 V); many specifications apply from
–40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or
temperature are presented in the Typical Characteristics.
CAUTION
Supply voltages larger than 40 V can permanently damage the device; see the
Absolute Maximum Ratings.
Place 0.1-μF bypass capacitors close to the power-supply terminals to reduce errors coupling in from noisy or
high-impedance power supplies. For more detailed information on bypass capacitor placement, see the Layout
section.
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