LMV821-N_15 Datasheet, PDF (27/46 Pages) Texas Instruments – LMV82x Single/Dual/Quad Low Voltage, Low Power, R-to-R Output, 5 MHz Op Amps

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10 Layout
LMV821-N, LMV822-N, LMV822-N-Q1, LMV824-N, LMV824-N-Q1
SNOS032H – AUGUST 1999 – REVISED APRIL 2014
10.1 Layout Guidelines
The V+ pin should be bypassed to ground with a low ESR capacitor.
The optimum placement is closest to the V+ and ground pins.
Care should be taken to minimize the loop area formed by the bypass capacitor connection between V+ and
ground.
The ground pin should be connected to the PCB ground plane at the pin of the device.
The feedback components should be placed as close to the device as possible minimizing strays.
10.2 Layout Example
Figure 47. 2-D Layout
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Product Folder Links: LMV821-N LMV822-N LMV822-N-Q1 LMV824-N LMV824-N-Q1