DAC3282_101 Datasheet, PDF (27/53 Pages) Texas Instruments – 16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter (DAC)

DAC3282
www.ti.com
SLAS646A – DECEMBER 2009 – REVISED FEBRUARY 2010
Register name: CONFIG19 – Address: 0x13, Default: 0x00
Register
Name
Address
Bit
Name
Function
CONFIG
19
0x13
7 bequalsa
When asserted the DACA data is driven onto DACB.
6 aequalsb
When asserted the DACB data is driven onto DACA.
5 Reserved
Reserved for factory use.
4 Unused
Reserved for factory use.
3 Unused
Reserved for factory use.
2 Unused
Reserved for factory use.
1 multi_sync_sel Selects the signal source for multiple device and clock divider synchronization.
multit_sync_sel
Sync Source
0
OSTR
1
FRAME through FIFO handoff
0 rev
Reverse the input bits for the data word. MSB becomes LSB.
Default
Value
0
0
0
0
0
0
0
0
Register name: CONFIG20 – Address: 0x14, Default: 0x00 (CAUSES AUTOSYNC)
Register
Name
CONFIG20
Address
0x14
Bit
Name
Function
Default
Value
7:0 qmc_offseta(7:0) Lower 8 bits of the DAC A offset correction. The offset is measured in
DAC LSBs. Writing this register causes an autosync to be
generated. This loads the values of all four qmc_offset registers
(CONFIG20-CONFIG23) into the offset block at the same time. When
updating the offset values CONFIG20 should be written last.
Programming any of the other three registers will not affect the
offset setting.
0x00
Register name: CONFIG21 – Address: 0x15, Default: 0x00
Register
Name
CONFIG21
Address
0x15
Bit
Name
Function
7:0 qmc_offsetb(7:0) Lower 8 bits of the DAC B offset correction. The offset is measured in
DAC LSBs.
Default
Value
0x00
Register name: CONFIG22 – Address: 0x16, Default: 0x00
Register
Name
CONFIG22
Address
0x16
Bit
Name
Function
7:3
qmc_offseta(12:8
)
Upper 5 bits of the DAC A offset correction.
2 Unused
Reserved for factory use.
1 Unused
Reserved for factory use.
0 Unused
Reserved for factory use.
Default
Value
00000
0
0
0
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