TPS51120_15 Datasheet, PDF (26/41 Pages) Texas Instruments – TPS51120 Dual, Synchronous Step-Down Controller With 100-mA Standby Regulators for Notebook System Power

TPS51120
SLUS670C – JULY 2005 – REVISED JANUARY 2015
Device Functional Modes (continued)
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C31
1 nF
V5FILT
VO2
3.3V/6A
+
C2B
150 µF
R21
100 kΩ
EN_LDO5
P_GOOD2
EN_LDO3
VBAT
GND
8
7
6
5
4
3
2
1
R11
100 kΩ
9
EN5
10 EN3
32
SKIPSEL
TONSEL 31
GND
P_GOOD1
VBAT
11 PGOOD2
PGOOD1 30
C10
20 µF
L2
2.2 µH
C2A
150 µF
EN_2
12 EN2
Q3
IRF7821
C21
0.1 µF
13 VBST2
14 DRVH2
Q4
IRF7832
15 LL2
DRVL2
16
TPS51120RHB
(QFN−32)
PowerPAD
EN1 29
VBST1 28
DRVH1 27
LL1 26
DRVL1
25
EN_1
C11
0.1 µF
C10
20 µF
Q1
IRF7821
L1
4.7 µH
Q2
IRF7832
C1A
150 µF
+
VO1
5V/6A
C1B
150 µF
VO2_GND −
PGND2
17 18 19 20 21 22 23 24
R22
3.3 kΩ
C30
10 µF
R50
5.1Ω
C51
1 µF
R12
3.6 kΩ
C30
C50
NA
10 µF
VBAT
Figure 30. D-Cap Mode, Fixed 5-V / 6-A, 3.3-V/6-A, R_DS(on) Sensing
− ^VO1_GND
PGND1
7.4.2.1 D-Cap Mode Operation
A buck converter system using D-CAP mode can be simplified as shown in Figure 31.
Figure 31. Linearizing the Modulator
The VO voltage is compare with internal reference voltage after divider resistors (Internal resistor mode. For
adjustable mode, the comparison is directly at VFB). The PWM comparator determines the timing to turn on top
MOSFET. The gain and speed of the comparator is high enough to keep the voltage at the beginning of each on
cycle (or the end of off cycle) substantially constant. The DC output voltage may have line regulation due to
ripple amplitude that slightly increases as the input voltage increase.
For the loop stability, the 0-dB frequency, f₀, defined below need to be lower than 1/3 of the switching frequency.
f₀ + _2p
1
ESR
C_O
v
f_SW
3
(19)
26
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