TPS40200_081 Datasheet, PDF (26/43 Pages) Texas Instruments – WIDE INPUT RANGE NON-SYNCHRONOUS VOLTAGE MODE CONTROLLER

TPS40200
SLUS659D – FEBRUARY 2006 – REVISED NOVEMBER 2008 ........................................................................................................................................ www.ti.com
Figure 40 shows the feedback network used in this application. This is a Type II compensation network which
gives a combination of good transient response and phase boost for good stability. This type of compensation
has a pole at the origin causing a -20dB/decade (-1) slope followed by a zero that causes a region of flat gain
followed by a final pole that returns the gain slope to -1 . The bode plot in Figure 41 shows the effect of these
poles and zeros.
The procedure for setting up the compensation network is as follows:
1. Determine the break frequency of the output capacitor.
2. Select a zero frequency well below this break frequency.
3. From the gain bandwidth of the error amplifier select a cross over frequency where the amplifier gain is large
relative to expected closed loop gain
4. Select a second zero well above the crossover frequency, that returns the gain slope to a -1 slope.
5. Calculate the required gain for the amplifier at crossover.
Be prepared to iterate this procedure to optimize the pole and zero locations as needed.
C₇
R₈
C₈
R₁₀
R₆
+
V_REF
Figure 40. Error Amplifier feedback Elements
The frequency response of this converter is largely determined by two poles that arise from the LC output filter
and a higher frequency zero caused by the ESR of the output capacitance. The poles from the output filter cause
a 40 dB/decade roll off with a phase shift approaching 180 degrees followed by the output capacitor zero that
reduced the roll off to -20 dB and gives a phase boost back toward 90 degrees. In other nomenclature, this is a
-2 slope followed by a -1 slope. The two zeros in the compensation network act to cancel the double pole from
the output filter The compensation network’s two poles produce a region where the error amplifier is flat and can
be set to a gain such that the overall gain of the system is zero dB. This region is set so that it brackets the
system crossover frequency.
Gain - dB
P
1
Slope = -1
Error Amplifier Type 2
Compensation
A
V2
A
V1
z
1
f
1
p
2
f₂
Freq.
Figure 41. Error Amplifier Bode Plot
26
Submit Documentation Feedback
Product Folder Link(s): TPS40200
Copyright © 2006–2008, Texas Instruments Incorporated