TLV320AIC23 Datasheet, PDF (26/42 Pages) Texas Instruments – STereo Audio CODEC, 8- to 96kHz, With Integrated Headphone Amplifier

The MICIN signal path has two gain stages. The first stage has a nominal gain of G1 = 50 k/10 k = 5. By adding an
external resistor (R_MIC) in series with MICIN, the gain of the first stage can be adjusted by G1 = 50 k/(10 k + R_MIC).
For example, R_MIC = 40 k gives a gain of 0 dB. The second stage has a software programmable gain of 0 dB or 20
dB (see Section 3.1.3).
50 kΩ
MICIN
10 kΩ
VMID
To ADC
0 dB/20 dB
Figure 3–4. Microphone Input Circuit
The microphone input is biased internally to VMID. When the line inputs are muted, the MICIN input is kept biased
to VMID using special antithump circuitry. This reduces audible clicks that may otherwise be heard when reactivating
the input.
The MICBIAS output provides a low-noise reference voltage suitable for biasing electret type microphones and the
associated external resistor biasing network. The maximum source current capability is 3 mA. This limits the smallest
value of external biasing resistors that safely can be used.
The MICBIAS output is not active in standby mode.
3.2.3 Line Outputs
The TLV320AIC23 has two low-impedance line outputs (LLINEOUT and RLINEOUT) capable of driving line loads
with 10-kΩ and 50-pF impedances.
The DAC full-scale output voltage is 1.0 V_RMS at AV_DD = 3.3 V. The full-scale range tracks linearly with the analog
supply voltage AV_DD. The DAC is connected to the line outputs via a low-pass filter that removes out-of-band
components. No further external filtering is required in most applications.
The DAC outputs, line inputs, and the microphone signal are summed into the line outputs. These sources can be
switched off independently. For example, in bypass mode, the line inputs are routed to the line outputs, bypassing
the ADC and the DAC. If sidetone is enabled, the microphone signal is routed to both line outputs via a four-step
programmable attenuation circuit.
The line outputs are muted by either muting the DAC (analog) or soft muting (digital) and disabling the bypass and
sidetone paths (see Section 3.1.3).
3.2.4 Headphone Output
The TLV320AIC23 has stereo headphone outputs (LHPOUT and RHPOUT), and is designed to drive 16-Ω or 32-Ω
headphones. The headphone output includes a high-quality volume control and mute function.
The headphone volume is logarithmically adjustable from 6 dB to –73 dB in 1-dB steps. Writing 000000 to the
volume-control registers (see Section 3.1.3) mutes the headphone output. When the headphone output is muted or
the device is placed in standby mode, the dc voltage is maintained at the outputs to prevent audible clicks.
A zero-cross detection circuit is provided under the control of the LZC and RZC bits. If this circuit is enabled, the
volume-control values are updated only when the input signal to the gain stage is close to the analog ground level.
This minimizes audible clicks as the volume is changed or the device is muted. This circuit has no time-out, so, if only
dc levels are being applied to the gain stage input of more than 20 mV, the gain is not updated.
The gain is independently programmable on the left and right channels. Both channels can be locked to the same
value by setting the RLS and LRS bits (see Section 3.1.3).
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