LM5032_15 Datasheet, PDF (26/34 Pages) Texas Instruments – High-Voltage Dual Interleaved Current Mode Controller

LM5032
SNVS344B – MARCH 2005 – REVISED DECEMBER 2014
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This gives plenty margin to the required 16-V minimum. Resistor R7 in series with the UVLO pin increases the
effective UVLO hysteresis.
8.2.2.4 VIN, VCC, Startup
To reduce the power dissipation in the internal startup regulator on the VIN pin, a separate external switching
regulator is used. This consists of U2 (LM5009) plus associated circuitry C5, C6, R1, R2, C7, D1, L1, R3 and R4.
This buck regulator is designed to generate a 10-V regulated supply voltage for the VCC of U1 LM5032. See the
LM5009 device datasheet, SNVS402, for detailed design information.
Since the LM5032 internal VIN regulator is not used in this design, the LM5032 VIN and VCC pins are shorted
together.
8.2.2.5 Soft-Start and Overload
Since the two soft-start pins SS1 and SS2 are connected to a single soft-start capacitor, C12, the combined
charging current of both soft-start pins charges the single soft-start capacitor. The soft-start delay to
commencement of first PWM switching can be calculated from:
t_{ss _ delay}
=
1.5V ´ C_SS
100mA
1.5 ´ 0.1mF
=
100mA
= 1.5ms
(22)
Thereafter, the soft-start ramp time will depend on the power stage design and the operating conditions (input
voltage and output load).
8.2.2.6 Current Sense
In order to improve the efficiency, a lower value current sense shunt resistance is used. To enable this lower
value, the normal operating range of the CS1/CS2 pins is reduced by adding an external DC offset to the
CS1/CS2 pins, as shown in Figure 30.
U3 VREF
2.0V
R23
U1
10k
1k
CS1
R10
Q1
R12-R16
0.022
Figure 30. Current Sense DC Offset Circuit
This circuit uses the 2.048-V reference U3 to add a typical offset of 185 mV to both current-sense pins. This
reduces the active range of the internal cycle-by-cycle current-limit comparator to 315 mV, allowing the current-
sense shunt to be decreased to 66% of the value that would be otherwise required.
From the power stage design calculations, the peak inductor current in each power stage was approximately 9 A
at max load and minimum Vin. Allowing for tolerances, and providing some margin for output overload, the
current-sense shunt resistors are chosen for a peak current limit of approximately 15 A:
R12 / R13 = ^{(0.5 - 0.185) V} = 21mW
15A
(23)
A standard value of 20 mΩ was used.
8.2.3 Application Curves
Figure 31 shows the measured efficiency as a function of load current and input voltage.
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