TPS54240_15 Datasheet, PDF (25/56 Pages) Texas Instruments – TPS54240 3.5-V to 42-V Step-Down DC - DC Converter With Eco-Mode™

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Feature Description (continued)
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Figure 42. Plot of Synchronizing in CCM
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TPS54240
SLVSAA6B – APRIL 2010 – REVISED NOVEMBER 2014
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Figure 43. Plot of Synchronizing in DCM
Figure 44. Plot of Synchronizing in PSM
7.3.16 Powergood (PWRGD Pin)
The PWRGD pin is an open-drain output. Once the VSENSE pin is between 94% and 107% of the internal
voltage reference, the PWRGD pin is de-asserted and the pin floats. TI recommends using a pullup resistor
between the values of 10 and 100 kΩ to a voltage source that is 5.5 V or less. The PWRGD is in a defined state
once the VIN input voltage is greater than 1.5 V but with reduced current sinking capability. The PWRGD will
achieve full current sinking capability as VIN input voltage approaches 3 V.
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