DAC5311-Q1 Datasheet, PDF (24/38 Pages) Texas Instruments – 1.8 V to 5.5 V, 80 mA, 8 BIT, LOW POWER, SINGLE CHANNEL, DIGITAL-TO-ANALOG CONVERTER

DAC5311-Q1
SBAS470 – JUNE 2009 ...................................................................................................................................................................................................... www.ti.com
RESISTOR STRING
The resistor string section is shown in Figure 87. It is simply a string of resistors, each of value R. The code
loaded into the DAC register determines at which node on the string the voltage is tapped off to be fed into the
output amplifier by closing one of the switches connecting the string to the amplifier. It is tested monotonic
because it is a string of resistors.
V_REF
V_REF
2
R_DIVIDER
R
R
To Output
Amplifier
R
R
Figure 87. Resistor String
OUTPUT AMPLIFIER
The output buffer amplifier is capable of generating rail-to-rail voltages on its output which gives an output range
of 0 V to AV_DD. It is capable of driving a load of 2 kΩ in parallel with 1000 pF to GND. The source and sink
capabilities of the output amplifier can be seen in the Typical Characteristics section for the given voltage input.
The slew rate is 0.7 V/µs with a half-scale settling time of typically 6µs with the output unloaded.
SERIAL INTERFACE
The DAC5311 has a 3-wire serial interface (SYNC, SCLK, and DIN) compatible with SPI, QSPI, and Microwire
interface standards, as well as most DSPs. See the Serial Write Operation timing diagram for an example of a
typical write sequence.
Input Shift Register
The input shift register is 16 bits wide, as shown in Table 2. The first two bits (PD0 and PD1) are reserved
control bits that set the desired mode of operation (normal mode or any one of three power-down modes) as
indicated in Table 3.
The remaining data bits are eight data bits, followed by don't care bits, as shown in Table 2.
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