TPS50301-HT Datasheet, PDF (23/28 Pages) Texas Instruments – 1.6-V TO 6.3-V INPUT, 3-A/6-A SYNCHRONOUS STEP DOWN SWIFT CONVERTER

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TPS50301-HT
TPS50601-SP
SLVSA94D – DECEMBER 2012 – REVISED JANUARY 2013
The low-side MOSFET may also sink current from the load. If the low-side sinking current limit is exceeded the
low-side MOSFET is turned off immediately for the rest of that clock cycle. In this scenario both MOSFETs are
off until the start of the next cycle.
When the low-side MOSFET turns off, switch node increases and forward biases the high-side MOSFET parallel
diode (high-side MOSFET is still off at this stage).
TPS50601 Thermal Shutdown
The internal thermal shutdown circuitry forces the device to stop switching if the junction temperature exceeds
175°C typically. The device reinitiates the power up sequence when the junction temperature drops below 165°C
typically.
Turn-On Behavior
Minimum on-time specification determines the maximum operating frequency of the design. As the unit starts up
and goes through its soft start process, the required duty-cycle is less than the minimum controllable on-time.
This can cause the converter to skip pulses. Thus, instantaneous output pulses can be higher or lower than the
desired voltage. This behavior is shown in and is only evident when operating at high frequency with high
bandwidth. Once the minimum on-pulse is greater than the minimum controllable on-time, the turn-on behavior is
normal. When operating at low frequencies (100 kHz or less), the turn-on behavior does not exhibit any ringing at
initial startup.
Small Signal Model for Loop Response
Figure 25 shows an equivalent model for the device control loop which can be modeled in a circuit simulation
program to check frequency response and transient responses. The error amplifier is a transconductance
amplifier with a gm of 1300 μA/V. The error amplifier can be modeled using an ideal voltage controlled current
source. The resistor Roea (30 MΩ) and capacitor Coea (20.7 pF) model the open loop gain and frequency
response of the error amplifier. The 1-mV ac voltage source between the nodes a and b effectively breaks the
control loop for the frequency response measurements. Plotting a/c and c/b show the small signal responses of
the power stage and frequency compensation respectively. Plotting a/b shows the small signal response of the
overall loop. The dynamic loop response can be checked by replacing the R_L with a current source with the
appropriate load step amplitude and step rate in a time domain analysis.
c
C2
Power Stage
18 A/V
COMP
R3 Coea
C1
0.8 V
Roea
gm
1300 mA/V
PH
a
b
R1
R_ESR
VSENSE
CO
R2
VOUT
R_L
Figure 25. Small Signal Model for Loop Response
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