REF1925_15 Datasheet, PDF (23/31 Pages) Texas Instruments – REF19xx Low-Drift, Low-Power, Dual-Output, VREF and VREF / 2 Voltage References

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12 Layout
REF1925, REF1930, REF1933, REF1941
SBOS697 – SEPTEMBER 2014
12.1 Layout Guidelines
Figure 54 shows an example of a PCB layout for a data acquisition system using the REF1930. Some key
considerations are:
• Connect low-ESR, 0.1-μF ceramic bypass capacitors at V_IN, V_REF, and V_BIAS of the REF1930.
• Decouple other active devices in the system per the device specifications.
• Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.
• Place the external components as close to the device as possible. This configuration prevents parasitic errors
(such as the Seebeck effect) from occurring.
• Minimize trace length between the reference and bias connections to the INA and ADC to reduce noise
pickup.
• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible and only make perpendicular crossings when absolutely necessary.
12.2 Layout Example
Analog Input
IN+
IN-
OUT
V+
GND
REF
C
C
Via
to GND
Plane
VBIAS
C
GND
EN
Via to
Input Power
VREF
C
C
VIN
REF
Microcontroller
A/D Input
DIG1
AIN
Figure 54. Layout Example
Copyright © 2014, Texas Instruments Incorporated
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Product Folder Links: REF1925 REF1930 REF1933 REF1941