TPA3001D1_07 Datasheet, PDF (22/28 Pages) Texas Instruments – 20-W MONO CLASS-D AUDIO POWER AMPLIFIER

TPA3001D1
SLOS398C – DECEMBER 2002 – REVISED JULY 2006
www.ti.com
DIFFERENTIAL INPUT
The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To
use the TPA3001D1 EVM with a differential source, connect the positive lead of the audio source to the INP
input and the negative lead from the audio source to the INN input. To use the TPA3001D1 with a single-ended
source, ac ground the INN input through a capacitor and apply the audio signal to the INP input. In a
single-ended input application, the INN input should be ac-grounded at the audio source instead of at the device
input for best noise performance.
SWITCHING FREQUENCY
The switching frequency is determined using the values of the components connected to R_OSC (pin 20) and C_OSC
(pin 21) and may be calculated with Equation 8:
f_s
+
6.6
R_OSC C_OSC
(8)
The frequency may be varied from 225 kHz to 275 kHz by adjusting the values chosen for R_OSC and C_OSC.
SHUTDOWN OPERATION
The TPA3001D1 employs a shutdown mode of operation designed to reduce supply current (I_CC) to the absolute
minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal should
be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs
to mute and the amplifier to enter a low-current state, I_CC(SD) = 1 µA. SHUTDOWN should never be left
unconnected, because amplifier operation would be unpredictable.
Ideally, the device should be held in shutdown when the system powers up and brought out of shutdown once
any digital circuitry has settled. However, if SHUTDOWN is to be left unused, the terminal may be connected
directly to V_CC.
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal)
capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this
resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this
resistance the more the real capacitor behaves like an ideal capacitor.
STARTUP TIME
The startup time can be calculated with Equation 9:
t_startup + 8.2 ms ) 2 100 kW C₁₁
(9)
where C₁₁ is the value of the bypass capacitor as shown in Figure 30.
PRINTED CIRCUIT BOARD (PCB) LAYOUT
Because the TPA3001D1 is a class-D amplifier that switches at a high frequency, the layout of the printed circuit
board (PCB) should be optimized according to the following guidelines for the best possible performance.
• Decoupling capacitors — As described on page 22, the high-frequency 0.1-uF decoupling capacitors should
be placed as close to the PVCC (pin 9 and pin 16) and VCC (pin 24) terminals as possible. The BYPASS
(pin 22) capacitor, VREF (pin 23) capacitor, and VCLAMP (pin 7) capacitor should also be placed as close
to the device as possible. The large (10 µF or greater) bulk power supply decoupling capacitor should be
placed near the TPA3001D1.
• Grounding — The VCC (pin 24) decoupling capacitor, VREF (pin 23) capacitor, BYPASS (pin 22) capacitor,
COSC (pin 21) capacitor, and ROSC (pin 20) resistor should each be grounded to analog ground (AGND,
pin 18 and pin 19). The PVCC (pin 9 and pin 16) decoupling capacitors should each be grounded to power
ground (PGND, pin 12 and pin 13). Analog ground and power ground may be connected at the PowerPAD,
which should be used as a central ground connection or star ground for the TPA3001D1.
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