SRC4192IDB Datasheet, PDF (22/34 Pages) Texas Instruments – 192kHz Stereo Asynchronous Sample Rate Converters

CONTROL REGISTER
DEFINITIONS (SRC4193 ONLY)
This section contains detailed descriptions for each control register. Reset defaults are also defined for each register bit.
Register 1: System Control Register
Bit 7 (MSB)
Bit 6
Bit 5
PDN
TRACK
0
Bit 4
MUTE
Bit 3
BYPAS
Bit 2
MODE2
Bit 1
MODE1
Bit 0 (LSB)
MODE0
MODE[2:0] Audio Serial Port Mode
MODE2
0
0
0
0
1
1
1
1
MODE1
0
0
1
1
0
0
1
1
MODE0
0
1
0
1
0
1
0
1
Audio Serial Port Mode
Both Serial Ports are in Slave Mode (Default)
Output Serial Port is Master with RCKI = 128fs
Output Serial Port is Master with RCKI = 512fs
Output Serial Port is Master with RCKI = 256fs
Both Serial Ports are in Slave Mode
Input Serial Port is Master with RCKI = 128fs
Input Serial Port is Master with RCKI = 512fs
Input Serial Port is Master with RCKI = 256fs
BYPAS
Bypass Mode
This bit is logically OR’d with the BYPAS input (pin 9)
BYPAS
0
1
Function
Bypass Mode Disabled with normal ASRC operation. (Default)
Bypass Mode Enabled with data routed directly from the input port to the output port,
bypassing the ARSC function.
MUTE
Output Soft Mute
This bit is logically OR’d with the MUTE input (pin 14)
MUTE
0
1
Output Mute Function
Soft Mute Disabled (Default)
Soft Mute Enabled with data attenuated to all 0’s
TRACK
Digital Attenuation Tracking
TRACK
0
1
Attenuation Tracking
Tracking Off: Attenuation for the Left and Right channels is controlled independently. (Default)
Tracking On: Left channel attenuation setting is used for both channels.
PDN
Power Down
Setting this bit to 0 will set the SRC4193 to the power-down state. All other register settings are preserved and
the SPI port remains active. (Default)
Setting this bit to 1 will power up the SRC4193 using the current register settings.
22
SRC4192, SRC4193
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SBFS022B