TRF370417_15_15 Datasheet, PDF (21/31 Pages) Texas Instruments – 50-MHz TO 6-GHz QUADRATURE MODULATOR

TRF370417
www.ti.com
SLWS213 – JANUARY 2010
Table 1. Bill of Materials for TRF370x EVM (continued)
Item
Number
Quantity
Reference
Designator
Value
TRF370333
10
1
U1
TRF370317
TRF370315
TRF370417
11
2
TP1, TP3
BLK
12
2
TP2, TP4
RED
PCB Footprint
QFN_24_163x163_
0p50mm
QFN_24_163x163_
0p50mm
QFN_24_163x163_
0p50mm
QFN_24_163x163_
0p50mm
TP_THVT_100_RND
TP_THVT_100_RND
Mfr. Name
TI
TI
TI
TI
KEYSTONE
KEYSTONE
Mfr. Part Number
Note
TRF370333
TRF370317
TRF370315
TRF370417
5001K
5000K
For TRF370333
EVM, TI supplied
For TRF370317
EVM, TI supplied
For TRF370315
EVM, TI supplied
For TRF370417
EVM, TI supplied
GSM Applications
The TRF370417 is suited for GSM and multicarrier GSM applications because of its high linearity and low noise
level over the entire recommended operating range. It also has excellent EVM performance, which makes it ideal
for the stringent GSM/EDGE applications.
WCDMA Applications
The TRF370417 is also optimized for WCDMA applications where both adjacent-channel power ratio (ACPR)
and noise density are critically important. Using Texas instruments’ DAC568X series of high-performance
digital-to-analog converters as depicted in Figure 49, excellent ACPR levels were measured with one-, two-, and
four-WCDMA carriers. See Electrical Characteristics, f_LO = 1960 MHz and f_LO = 2140 MHz for exact ACPR
values.
16
DAC5687
16
TRF370x
I/Q
Modulator
RF Out
CLK1
CLK2
CDCM7005
Clock Gen
VCXO
Ref Osc
TRF3761
PLL
LO Generator
Figure 49. Typical Transmit Setup Block Diagram
B0176-02
DAC-to-Modulator Interface Network
For optimum linearity and dynamic range, the digital-to-analog converter (DAC) can interface directly with the
modulator; however, the common-mode voltage of each device must be maintained. A passive interface circuit is
used to transform the common-mode voltage of the DAC to the desired set-point of the modulator. The passive
circuit invariably introduces some insertion loss between the two devices. In general, it is desirable to keep the
insertion loss as low as possible to achieve the best dynamic range. Figure 50 shows the passive interconnect
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