TPS54521_15 Datasheet, PDF (21/41 Pages) Texas Instruments – 4.5V to 17V Input, 5A Synchronous Step Down Converter

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TPS54521
SLVS981C – JUNE 2010 – REVISED AUGUST 2013
1
¦z =
C_O ´ R_ESR ´ 2p
(13)
Where
gm_ea is the GM amplifier gain (1300μA/V)
gm_ps is the power stage gain (12A/V).
R_L is the load resistance
C_O is the output capacitance.
R_ESR is the equivalent series resistance of the output capacitor.
Small Signal Model for Frequency Compensation
The device uses a transconductance amplifier for the error amplifier and readily supports two of the commonly
used Type II compensation circuits and a Type III frequency compensation circuit, as shown in Figure 33. In
Type 2A, one additional high frequency pole, C6, is added to attenuate high frequency noise. In Type III, one
additional capacitor, C11, is added to provide a phase boost at the crossover frequency. See Designing Type III
Compensation for Current Mode Step-Down Converters (SLVA352) for a complete explanation of Type III
compensation.
The design guidelines below are provided for advanced users who prefer to compensate using the general
method. The below equations only apply to designs whose ESR zero is above the bandwidth of the control loop.
This is usually true with ceramic output capacitors. See the Application Information section for a step-by-step
design procedure using higher ESR output capacitors with lower ESR zero frequencies.
VOUT
C11
R8 _VSENSE
Type 3
Vref
R9
gmea
Roea
COMP ^{Type 2A Type 2B}
R4 C6
R4
Coea
C4
C4
Figure 33. Types of Frequency Compensation
The general design guidelines for device loop compensation are as follows:
1. Determine the crossover frequency, fc. A good starting point is 1/10^th of the switching frequency, fsw.
2. R4 can be determined by:
R4 = ^{2p ´ ¦c ´ VOUT ´ Co}
gm_ea ´ Vref ´ gm_ps
(14)
Where:
gm_ea is the GM amplifier gain (1300μA/V)
gm_ps is the power stage gain (12A/V)
Vref is the reference voltage (0.8V)
3.
æ
ç
¦p
=
Place a compensation zero at the dominant pole: ^è
C_O
´
1
R_L
´
ö
2p
÷
ø
C4 can be determined by:
C4 = ^{RL ´ Co}
R4
(15)
4. C6 is optional. It can be used to cancel the zero from the ESR (Equivalent Series Resistance) of the output
capacitor Co.
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