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TPS54040A_15 Datasheet, PDF (21/52 Pages) Texas Instruments – 0.5 A, 42 V Step Down DC/DC Converter with Eco-mode™
TPS54040A
www.ti.com
SLVSB58A – MARCH 2012 – REVISED JANUARY 2014
DETAILED DESCRIPTION (continued)
Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
The switching frequency of the TPS54040A is adjustable over a wide range from approximately 100kHz to
2500kHz by placing a resistor on the RT/CLK pin. The RT/CLK pin voltage is typically 0.5V and must have a
resistor to ground to set the switching frequency. To determine the timing resistance for a given switching
frequency, use Equation 11 or the curves in Figure 40 or Figure 41. To reduce the solution size one would
typically set the switching frequency as high as possible, but tradeoffs of the supply efficiency, maximum input
voltage and minimum controllable on time should be considered.
The minimum controllable on time is typically 130ns and limits the maximum operating input voltage.
The maximum switching frequency is also limited by the frequency shift circuit. More discussion on the details of
the maximum switching frequency is located below.
RT (kOhm) =
206033
¦sw (kHz)1.0888
(11)
SWITCHING FREQUENCY
vs
RT/CLK RESISTANCE HIGH FREQUENCY RANGE
2500
2000
VI = 12 V,
TJ = 25°C
SWITCHING FREQUENCY
vs
RT/CLK RESISTANCE LOW FREQUENCY RANGE
500
400
VI = 12 V,
TJ = 25°C
1500
300
1000
200
500
100
0
0
25
50
75 100 125 150 175 200
RT/CLK - Clock Resistance - kW
Figure 40. High Range RT
0
200 300 400 500 600 700 800 900 1000 1100 1200
RT/CLK - Resistance - kW
Figure 41. Low Range RT
Overcurrent Protection and Frequency Shift
The TPS54040A implements current mode control which uses the COMP pin voltage to turn off the high side
MOSFET on a cycle by cycle basis. Each cycle the switch current and COMP pin voltage are compared, when
the peak switch current intersects the COMP voltage, the high side switch is turned off. During overcurrent
conditions that pull the output voltage low, the error amplifier will respond by driving the COMP pin high,
increasing the switch current. The error amplifier output is clamped internally, which functions as a switch current
limit.
To increase the maximum operating switching frequency at high input voltages the TPS54040A implements a
frequency shift. The switching frequency is divided by 8, 4, 2, and 1 as the voltage ramps from 0 to 0.8 volts on
VSENSE pin.
The device implements a digital frequency shift to enable synchronizing to an external clock during normal
startup and fault conditions. Since the device can only divide the switching frequency by 8, there is a maximum
input voltage limit in which the device operates and still have frequency shift protection.
During short-circuit events (particularly with high input voltage applications), the control loop has a finite minimum
controllable on time and the output has a low voltage. During the switch on time, the inductor current ramps to
the peak current limit because of the high input voltage and minimum on time. During the switch off time, the
inductor would normally not have enough off time and output voltage for the inductor to ramp down by the ramp
up amount. The frequency shift effectively increases the off time allowing the current to ramp down.
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