OPA2683 Datasheet, PDF (20/33 Pages) Texas Instruments – Very Low-Power, Dual, Current-Feedback Operational Amplifier

OUTPUT CURRENT AND VOLTAGE
The OPA2683 provides output voltage and current capabili-
ties that can support the needs of driving doubly-terminated
50Ω lines. If the 1kΩ load of Figure 1 is changed to a 100Ω
load, the total load is the parallel combination of the 100Ω
load, and the 1.9kΩ total feedback network impedance. This
95Ω load will require no more than 42mA output current to
support the ±4.0V minimum output voltage swing specified
for 1kΩ loads. This is well below the specified minimum
+120/–90mA specifications over the full temperature range.
The specifications described above, though familiar in the
industry, consider voltage and current limits separately. In
many applications, it is the voltage • current, or V-I product,
which is more relevant to circuit operation. Refer to the
Output Voltage and Current Limitations plot in the Typical
Characteristics. The X- and Y-axes of this graph show the
zero-voltage output current limit and the zero-current output
voltage limit, respectively. The four quadrants give a more
detailed view of the OPA2683’s output drive capabilities.
Superimposing resistor load lines onto the plot shows the
available output voltage and current for specific loads.
The minimum specified output voltage and current over
temperature are set by worst-case simulations at the cold
temperature extreme. Only at cold startup will the output
current and voltage decrease to the numbers shown in the
electrical characteristic tables. As the output transistors de-
liver power, their junction temperatures will increase, de-
creasing their V_BEs (increasing the available output voltage
swing) and increasing their current gains (increasing the
available output current). In steady-state operation, the avail-
able output voltage and current will always be greater than
that shown in the over-temperature specifications since the
output stage junction temperatures will be higher than the
minimum specified operating ambient.
To maintain maximum output stage linearity, no output short-
circuit protection is provided. This will not normally be a
problem, since most applications include a series matching
resistor at the output that will limit the internal power dissipa-
tion if the output side of this resistor is shorted to ground.
However, shorting the output pin directly to the adjacent
positive power-supply pin can destroy the amplifier. If addi-
tional short-circuit protection is required, consider a small
series resistor in the power-supply leads. This resistor will,
under heavy output loads, reduce the available output volt-
age swing. A 5Ω series resistor in each power-supply lead
will limit the internal power dissipation to less than 1W for an
output short-circuit, while decreasing the available output
voltage swing only 0.25V for up to 50mA desired load
currents. Always place the 0.1µF power-supply decoupling
capacitors after these supply current limiting resistors directly
on the supply pins.
DRIVING CAPACITIVE LOADS
One of the most demanding and yet very common load
conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an ADC, including additional
external capacitance which may be recommended to im-
prove ADC linearity. A high-speed, high open-loop gain
amplifier like the OPA2683 can be very susceptible to de-
creased stability and closed-loop response peaking when a
capacitive load is placed directly on the output pin. When the
amplifier’s open-loop output resistance is considered, this
capacitive load introduces an additional pole in the signal
path that can decrease the phase margin. Several external
solutions to this problem have been suggested. When the
primary considerations are frequency response flatness, pulse
response fidelity, and/or distortion, the simplest and most
effective solution is to isolate the capacitive load from the
feedback loop by inserting a series isolation resistor between
the amplifier output and the capacitive load. This does not
eliminate the pole from the loop response, but rather shifts it
and adds a zero at a higher frequency. The additional zero
acts to cancel the phase lag from the capacitive load pole,
thus increasing the phase margin and improving stability.
The Typical Characteristics show the recommended R_S vs
C_LOAD and the resulting frequency response at the load. The
1kΩ resistor shown in parallel with the load capacitor is a
measurement path and may be omitted. The required series
resistor value may be reduced by increasing the feedback
resistor value from its nominal recommended value. This will
increase the phase margin for the loop gain, allowing a lower
series resistor to be effective in reducing the peaking due to
capacitive load. SPICE simulation can be effectively used to
optimize this approach. Parasitic capacitive loads greater
than 5pF can begin to degrade the performance of the
OPA2683. Long PC board traces, unmatched cables, and
connections to multiple devices can easily cause this value
to be exceeded. Always consider this effect carefully, and
add the recommended series resistor as close as possible to
the OPA2683 output pin (see Board Layout Guidelines).
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OPA2683
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