UCD7242_10 Datasheet, PDF (2/33 Pages) Texas Instruments – Digital Dual Synchronous-Buck Power Driver

UCD7242
SLUS962 – JANUARY 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DESCRIPTION (CONTINUED)
On-board comparators monitor the current through the high side switch to safeguard the power stage from
sudden high current loads. Blanking delay is set for the high side comparator to avoid false reports coincident
with switching edge noise. In the event of an over-current fault, the high-side FET is turned off and the Fault Flag
(FLT) is asserted to alert the controller.
MOSFET current is measured and monitored by a precision integrated current sense element. This method
provides an accuracy of ±5% over most of the load range. The amplified signal is available for use by the
controller on the I_MON pin.
An on-chip temperature sense converts the die temperature to a voltage at the T_MON pin for the controller’s use.
If the die temperature exceeds 170°C, the temperature sensor initiates a thermal shutdown that halts output
switching and sets the FLT flag. Normal operation resumes when the die temperature falls below the thermal
hysteresis band.
VIN
VIN
VIN
TMON
30 31 32
19
27 28 29
UCD7242
VIN
VOUT-B
PWM-B
1
SRE-B
2
FLT -B
9
Drive
Logic
IMON-B
7
BST-B
3
BSW-B
4
SW-B
13
PGND
10
11
12
Current
Sense
Processor
VIN
Driver
Driver
8
Testmode
21
GND
Thermal
Sense
VIN
VGG
Generator
VDD LDO
Drive
Logic
Current
Sense
Processor
VIN
Driver
Driver
6
22
VGG DIS BP3
5
VGG
Short
PWM-A
26
SRE-A
25
FLT -A
18
IMON-A
20
BST-A
24
BSW-A
23
SW-A
14
PGND
15
16
17
VOUT-A
Figure 1. Typical Application Circuit and Block Diagram
2
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