UCC1807 Datasheet, PDF (2/11 Pages) Texas Instruments – Programmable Maximum Duty Cycle PWM Controller

UCC1807-1/-2/-3
UCC2807-1/-2/-3
UCC3807-1/-2/-3
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (I_DD 10mA). . . . . . . . . . . . . . . . . . . . . . . 13.5V
Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
OUT Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1A
Analog Inputs (FB, CS) . . . . . . . . . . . . . –0.3V to (VDD + 0.3V)
Power Dissipation at T_A +25°C (N or J packages) . . . . . . . . 1W
Power Dissipation at T_A +25°C (D package) . . . . . . . . . . 0.65W
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
All currents are positive into, negative out of the specified ter-
minal. Consult Packaging Section of Databook for thermal limi-
tations and considerations of packages.
CONNECTION DIAGRAMS
DIL-8, SOIC-8, TSSOP-8 (Top View)
J, N, D or PW Packages
ORDERING INFORMATION
UCC 807
–
UVLO Threshold
Package
Temperature Range
ELECTRICAL CHARACTERISTICS:Unless otherwise stated these specifications apply for T_A = –55°C to +125°C for
UCC1807-1/-2/-3; –40°C to +85°C for UCC2807-1/-2/-3; and 0°C to +70°C for UCC3807-1/-2/-3; VDD = 10V (Note 6), R_A = 12kW ,
R_B = 4.7kW , CT = 330pF, 1.0m F capacitor from VDD to GND, T_A = T_J.
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNITS
Oscillator Section Section
Frequency
175 202 228 kHz
Temperature Stability
(Note 5)
2.5
%
Amplitude
(Note 1)
1/3VDD
V
Error Amplifier Section
Input Voltage
COMP = 2.0V
1.95 2.00 2.05 V
Input Bias Current
–1
1
mA
Open Loop Voltage Gain
60 80
dB
COMP Sink Current
FB = 2.2V, COMP = 1.0V
0.3 2.5
mA
COMP Source Current
FB = 1.3V, COMP = 4.0V
–0.2 –0.5
mA
PWM Section
Maximum Duty Cycle
75 78
81
%
Minimum Duty Cycle
COMP = 0V
0
%
Current Sense Section
Gain
(Note 2)
1.1 1.65 1.8 V/V
Maximum Input Signal
COMP = 5.0V (Note 3)
0.9 1.0 1.1
V
Input Bias Current
–200
200 nA
CS Blank Time
50 100 150 ns
Overcurrent Threshold
1.4 1.5 1.6
V
COMP to CS Offset
CS = 0V
0.55 1.1 1.65 V
Output Section
OUT Low Level
I = 100mA
0.4
1
V
OUT High Level
I = –100mA, VDD - OUT
0.4
1
V
Rise/Fall Time
CL = 1nF (Note 5)
20 100 ns
Undervoltage Lockout Section
2