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TPS54426_15 Datasheet, PDF (2/29 Pages) Texas Instruments – 4.5V to 18V Input, 4-A Synchronous Step-Down SWIFT™ Converter with Eco-Mode™
TPS54426
SLVSAD6C – AUGUST 2010 – REVISED JULY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
TA
–45°C to 85°C
ORDERING INFORMATION(1)
PACKAGE(2) (3)
ORDERABLE PART NUMBER
PIN
PowerPAD™
(HTSSOP) – PWP
TPS54426PWP
14
TPS54426PWPR
TPS54426RSAT
Plastic Quad Flat Pack (QFN)
16
TPS54426RSAR
TRANSPORT MEDIA
Tube
Tape and Reel
Tape and Reel
Tape and Reel
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) All package options have Cu NIPDAU lead/ball finish.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
VIN1, VIN2, EN
VBST
VI
Input voltage range
VBST (10 ns transient)
VFB, VO, SS, PG
SW1, SW2
SW1, SW2 (10 ns transient)
VO
Vdiff
ESD rating
Output voltage range
VREG5
PGND1, PGND2
Voltage from GND to POWERPAD
Electrostatic
discharge
Human Body Model (HBM)
Charged Device Model (CDM)
TJ
Operating junction temperature
Tstg
Storage temperature
VALUE
–0.3 to 20
–0.3 to 26
–0.3 to 28
–0.3 to 6.5
–2 to 20
–3 to 22
–0.3 to 6.5
–0.3 to 0.3
–0.2 to 0.2
2
500
–40 to 150
–55 to 150
UNIT
V
V
V
V
V
V
V
V
V
kV
V
°C
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
θJA
θJCtop
θJB
ψJT
ψJB
θJCbot
THERMAL METRIC(1)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
TPS54426
PWP (14) PINS RSA (16) PINS
55.6
37.3
51.3
42.5
36.4
14.9
1.8
0.8
20.6
14.8
4.3
4.9
UNITS
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2
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