TPS3307- Datasheet, PDF (2/14 Pages) Texas Instruments – TRIPLE PROCESSOR SUPERVISORS

TPS3307-18, TPS3307-25, TPS3307-33
SLVS199B – DECEMBER 1998 – REVISED OCTOBER 2004
www.ti.com
An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system
reset. The delay time, t_{d (typ)} = 200ms, starts after all SENSEn inputs have risen above the threshold voltage V_IT+.
When the voltage at any SENSE input drops below the threshold voltage V_IT-, the RESET output becomes active
(low) again.
The TPS3307-xx family of devices incorporates a manual reset input, MR. A low level at MR causes RESET to
become active. In addition to the active-low RESET output, the TPS3307-xx family includes an active-high
RESET output.
The devices are available in either 8-pin MSOP or standard 8-pin SO packages.
The TPS3307-xx devices are characterized for operation over a temperature range of –40°C to 85°C.
SUPPLY VOLTAGE MONITORING
DEVICE
TPS3307-18
TPS3307-25
TPS3307-33
NOMINAL SUPERVISED VOLTAGE
SENSE1
SENSE2
SENSE3
3.3V
1.8V
User defined
3.3V
2.5V
User defined
5V
3.3V
User defined
SENSE1
2.93V
2.93V
4.55V
THRESHOLD VOLTAGE (TYP)
SENSE2
SENSE3
1.68V
1.25V ⁽¹⁾
2.25V
1.25V ⁽¹⁾
2.93V
1.25V ⁽¹⁾
(1) The actual sense voltage has to be adjusted by an external resistor divider according to the application requirements.
AVAILABLE OPTIONS
T_A
-40°C to 85°C
PACKAGED DEVICES
SMALL OUTLINE
(D)
PowerPAD™
µ-SMALL OUTLINE
(DGN)
TPS3307-18D
TPS3307-18DGN
TPS3307-25D
TPS3307-25DGN
TPS3307-33D
TPS3307-33DGN
FUNCTION/TRUTH TABLES
MR
SENSE1 > V_IT1
SENSE2 > V_IT2
SENSE3 > V_IT3
L
X ⁽¹⁾
X ⁽¹⁾
X
H
0
0
0
H
0
0
1
H
0
1
0
H
0
1
1
H
1
0
0
H
1
0
1
H
1
1
0
H
1
1
1
(1) X = Don't care
MARKING
DGN PACKAGE
TIAAP
TIAAQ
TIAAR
RESET
L
L
L
L
L
L
L
L
H
CHIP FORM
(Y)
TPS3307-18Y
TPS3307-25Y
TPS3307-33Y
RESET
H
H
H
H
H
H
H
H
L
2