TLV717P Datasheet, PDF (2/24 Pages) Texas Instruments – 150-mA, Low-Dropout Regulator with Foldback Current Limit for Portable Devices

TLV717xx
TLV717xxP
SBVS176A – OCTOBER 2011 – REVISED APRIL 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PRODUCT
TLV717xx(x)Pyyyz
ORDERING INFORMATION⁽¹⁾
V_OUT
XX(X) is the nominal output voltage. For output voltages with a resolution of 100 mV, two
digits are used in the ordering number; otherwise, three digits are used (for example, 28 =
2.8 V; 475 = 4.75 V).
P is optional; devices with P have an LDO regulator with an active output discharge.
YYY is the package designator.
Z is the package quantity. R is for reel (3000 pieces), T is for tape (250 pieces).
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder on www.ti.com.
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
At T_J = –25°C, unless otherwise noted. All voltages are with respect to GND.
Voltage
Current
Output short-circuit duration
Continuous total power dissipation, P_DISS
Temperature
Electrostatic discharge (ESD) ratings
Input range, V_IN
Enable range, V_EN
Output range, V_OUT
Maximum output, I_OUT
Junction range, T_J
Storage junction range, T_stg
Human body model (HBM)
Charged device model (CDM)
VALUE
MIN
MAX
UNIT
–0.3
6.0
V
–0.3
–0.3
V_IN + 0.3
V
6.0
V
Internally limited
Indefinite
See Thermal Information table
–55
+150
°C
–55
+150
°C
2000
V
500
V
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-
maximum rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
THERMAL METRIC⁽¹⁾
θ_JA
θ_JC(top)
θ_JB
ψ_JT
ψ_JB
θ_JC(bottom)
Junction-to-ambient thermal resistance
Junction-to-case(top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case(bottom) thermal resistance
TLV717xx
TLV717xxP
DQN
4 PINS
393.3
140.3
330
6.5
329
147.5
UNITS
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2
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Product Folder Link(s): TLV717xx TLV717xxP