TLV5610IYE Datasheet, PDF (2/14 Pages) Texas Instruments – 2.7 V TO 5.5V. 12-AND 10-BIT OCTAL DAC IN WAFER CHIP SCALE PACKAGE

TLV5610IYE
TLV5608IYE
SLAS393 − OCTOBER 2003
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGE
TA
WCS(1)
(YE)
−40°C to 85°C
TLV5610IYE
TLV5608IYE
(1) _{Wafer chip scale package. See Figure 13.}
FUNCTIONAL BLOCK DIAGRAM
REF
SCLK
DIN
DOUT
FS
MODE
PRE
LDAC
Serial
12
Interface
8
12/10
12/10
12/10
X2
DAC A
Holding
Latch
DAC A
Latch
DAC B, C, D, E, F, G and H
Same as DAC A
OUTA
OUT
B, C, D,
E, F, G
and H
Terminal Functions
TERMINAL
NAME
I/O
NO.
DESCRIPTION
AGND
10
P Analog ground
AVDD
DGND
11
P Analog power supply
1
P Digital ground
DIN
2
I Digital serial data input
DOUT
19
O Digital serial data output
DVDD
FS
20
P Digital power supply
4
I Frame sync input
LDAC
18
I Load DAC. The DAC outputs are only updated, if this signal is low. It is an asynchronous input.
MODE
17
I DSP/µC mode pin. High = µC mode, NC = DSP mode.
PRE
5
I Preset input
REF
16
I Voltage reference input
SCLK
3
I Serial clock input
OUTA−OUTH
12−15, O DAC outputs A, B, C, D, E, F, G and H
6−9
2