THS4531_15 Datasheet, PDF (2/55 Pages) Texas Instruments – Ultra Low Power, Rail-to-Rail Output, Fully-Differential Amplifier

THS4531
SLOS358B – SEPTEMBER 2011 – REVISED MARCH 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PRODUCT
THS4531
CHANNEL
COUNT
1
1
1
1
1
1
PACKAGING/ORDERING INFORMATION⁽¹⁾
PACKAGE-
LEAD
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
SOIC-8
T4531
D
–40°C to +125°C
T4531
VSSOP-8
DGK
–40°C to +125°C
4531
4531
WQFN-10
RUN
–40°C to +125°C
4531
4531
ORDERING
NUMBER
THS4531ID
THS4531IDR
THS4531IDGK
THS4531IDGKR
THS4531IRUNT
THS4531IRUNR
TRANSPORT MEDIA,
QUANTITY
Rails, 75
Tape and reel, 2500
Rails, 80
Tape and reel, 2500
Tape and reel, 250
Tape and reel, 3000
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V_S– to V_S+
Input/output voltage, V_IN±, V_OUT±, and V_OCM pins
Differential input voltage, V_ID
Continuous output current, I_O
Continuous input current, I_i
Continuous power dissipation
Maximum junction temperature, T_J
Operating free-air temperature range, T_A
Storage temperature range, T_stg
Electrostatic
discharge (ESD)
ratings:
Human body model (HBM)
Charge device model (CDM)
Machine model (MM)
THERMAL INFORMATION
THERMAL METRIC⁽¹⁾
θ_JA
θ_JCtop
θ_JB
ψ_JT
ψ_JB
θ_JCbot
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
VALUE
5.5
(V_S–) – 0.7 to (V_S+) + 0.7
1
50
0.75
See Thermal Information
150
–40 to +125
–65 to +150
3000
500
200
UNITS
V
V
mA
mA
°C
°C
°C
V
V
V
THS4531
SOIC
(P)
8 PINS
133
78
73
26
73
N/A
THS4531
VSSOP
(MSOP)
(DGK)
8 PINS
198
84
120
19
118
N/A
THS4531
WQFN
(RUN)
10 PINS
163
66
113
17
113
N/A
UNITS
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2
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