THS4141CDGNR Datasheet, PDF (2/33 Pages) Texas Instruments – HIGH-SPEED FULLY DIFFERENTIAL I/O AMPLIFIERS

THS4140
THS4141
SLOS320F – MAY 2000 – REVISED JANUARY 2006
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
T_A
0°C to 70°C
–40°C to 85°C
SMALL OUTLINE
(D)
THS4140CD
THS4141CD
THS4140ID
THS4141ID
Table 1. AVAILABLE OPTIONS
PACKAGED DEVICES⁽¹⁾
MSOP PowerPAD™
MSOP
(DGN)
SYMBOL
(DGK)
THS4140CDGN
AOF
THS4140CDGK
THS4141CDGN
AOI
THS4141CDGK
THS4140IDGN
AOG
THS4140IDGK
THS4141IDGN
AOK
THS4141IDGK
SYMBOL
ATR
ATS
ASQ
ASR
EVALUATION
MODULES
THS4140EVM
THS4141EVM
–
–
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
V_CC
Supply voltage
V_CC– to V_CC+
V_I
Input voltage
I_O
Output current⁽²⁾
V_ID
Differential input voltage
Continuous total power dissipation
Maximum junction temperature⁽³⁾
T_J
Maximum junction temperature, continuous operation, long term reliability⁽⁴⁾
C suffix
T_A
Operating free-air temperature
I suffix
T_stg
Storage temperature
Lead temperature 1,6 mm (1/16 Inch) from case for 10 seconds
HBM
ESD ratings
CDM
MM
UNIT
±16.5 V
±V_CC
150 mA
±6 V
See Dissipation Rating Table
150°C
125°C
0°C to 70°C
–40°C to 85°C
–65°C to 150°C
300°C
2500 V
1500 V
200 V
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The THS414x may incorporate a PowerPad™ on the underside of the chip. This acts as a heatsink and must be connected to a
thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature
which could permanently damage the device. See TI technical brief SLMA002 and SLMA004 for more information about utilizing the
PowerPad™ thermally enhanced package.
(3) The absolute maximum temperature under any condition is limited by the constraints of the silicon process.
(4) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device.
DISSIPATION RATING TABLE
PACKAGE
D
DGN
DGK
θ_JA(1) (°C/W)
97.5
58.4
260
θ_JC (°C/W)
38.3
4.7
54.2
POWER RATING⁽²⁾
T_A = 25°C
1.02 W
T_A = 85°C
410 mW
1.71 W
685 mW
385 mW
154 mW
(1) This data was taken using the JEDEC standard High-K test PCB.
(2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase.
Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and long
term reliability.
2
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