THS4121CD Datasheet, PDF (2/30 Pages) Texas Instruments – HIGH-SPEED FULLY DIFFERENTIAL I/O AMPLIFIERS

THS4120
THS4121
SLOS319D – FEBRUARY 2001 – REVISED OCTOBER 2004
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
T_A
SMALL OUTLINE(D)
0°C to 70°C
–40°C to 85°C
THS4120CD
THS4121CD
THS4120ID
THS4121ID
AVAILABLE OPTIONS
PACKAGED DEVICES
MSOP PowerPAD™
(DGN)
SYMBOL
THS4120CDGN
ARL
THS4121CDGN
ASB
THS4120IDGN
ARM
THS4121IDGN
ASC
MSOP
(DGK)
THS4120CDGK
THS4121CDGK
THS4120IDGK
THS4121IDGK
SYMBOL
ATZ
ATO
ARN
ASN
EVALUATION
MODULES
THS4120EVM
THS4121EVM
–
–
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) ⁽¹⁾
Supply voltage, GND to V_DD
V_I
Input voltage
I_O
Output current (sink) ⁽²⁾
V_ID Differential input voltage
Continuous total power dissipation
T_J
Maximum junction temperature⁽³⁾
T_J
Maximum junction temperature, continuous operation, long-term reliability⁽⁴⁾
C suffix
T_A
Operating free-air temperature
I suffix
T_stg Storage Temperature
Lead temperature 1,6 mm (1/16 Inch) from case for 10 seconds
HBM
ESD ratings
CDM
MM
UNIT
3.6 V
±V_DD
110 mA
±V_DD
See Dissipation Rating Table
150°C
125°C
0°C to 70°C
–40°C to 85°C
–65°C to 150°C
300°C
4000 V
1500 V
200 V
(1) Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The THS412x may incorporate a PowerPad™ on the underside of the chip. This acts as a heatsink and must be connected to a
thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature
which could permanently damage the device. See TI technical brief SLMA002 and SLMA004 for more information about utilizing the
PowerPad™ thermally enhanced package.
(3) The absolute maximum temperature under any condition is limited by the constraints of the silicon process.
(4) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device.
PACKAGE
D
DGN
DGK
DISSIPATION RATING TABLE
θ_JA(1) (°C/W)
97.5
θ_JC (°C/W)
38.3
POWER RATING⁽²⁾
T_A = 25°C
T_A = 85°C
1.02 W
410 mW
58.4
4.7
1.71 W
685 mW
260
54.2
385 mW
154 mW
(1) This data was taken using the JEDEC standard High-K test PCB.
(2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion
starts to substantially increase. Thermal management of the final PCB should strive to keep the
junction temperature at or below 125°C for best performance and long-term reliability.
2
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