TCA9406 Datasheet, PDF (2/19 Pages) Texas Instruments – 2-BIT BIDIRECTIONAL 1MHz, I2C BUS AND SMBUS VOLTAGE-LEVEL TRANSLATOR

TCA9406
SCPS221 – JULY 2010
www.ti.com
With the standard I²C bus system, it needs pull-up resistors to provide logic HIGH levels on the translator
bus. The TCA9406 is an open-drain bus level configuration of the I²C-bus. The value of pullup resistors
depends on the system, but each side of the translator must have pull-up resistors and TCA9406 already has
10 kΩ pullup resistors on each side and it allows to add additional external pull-up resistors. It can work with
standard-mode, fast-mode and fast mode plus I²C-bus devices in additional to SMBus.
The TCA9406 is not a bus buffer like the PCA9515A and PCA9517. It provides both level translation and
physically isolates the capacitance to either side of the bus when both sides are connected. The I_off feature
can be utilized to isolate the bus into high impedance when using the power supply to off the either V_CCA or
V_CCB.
The Enable (OE) should be tied to GND through a pulldown resistor to ensure the high-impedance state
during power up or power down. The minimum value of the resistor is determined by the current-sourcing
capability of the driver.
ORDERING INFORMATION⁽¹⁾
T_A
PACKAGE ⁽²⁾
ORDERABLE PART NUMBER
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
Reel of 3000 TCA9406YZPR
–40°C to 85°C _{SSOP – DCT}
Reel of 3000
Tube of 250
TCA9406DCTR
TCA9406DCTT
VSSOP – DCU
Reel of 3000 TCA9406DCUR
TOP-SIDE MARKING⁽³⁾
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DCT: The actual top-side marking has three additional characters that designate the year, month, and wafer fab/assembly site.
DCU: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
NO.
DCT,
DCU
YZP
1
A1
2
B1
3
C1
4
D1
5
D2
6
C2
7
B2
8
A2
NAME
SDA_B
GND
V_CCA
SDA_A
SCL_A
OE
V_CCB
SCL_B
TYPE
I/O
GND
PWR
I/O
I/O
Input
PWR
I/O
PIN DESCRIPTION
FUNCTION
Input/output B. Referenced to V_CCB. Allow I2C_SDA configured to 2.5V/3.3V/5V
Ground
A-port supply voltage. 1.65 V ≤ V_CCA ≤ 3.6 V and V_CCA ≤ V_CCB. Configuration for
SDA_A, SCL_A, and OE
Input/output A. Referenced to V_CCA. Allows I2C_SDA configured to 1.8V, 2.5V, 3.3V
Input/output A. Referenced to V_CCA. Allows I2C_SCL configured to 1.8V, 2.5V, 3.3V
Output enable (active High). Pull OE low to place all outputs in 3-state mode.
Referenced to V_CCA. Pull OE to LOW to place all outputs in 3-state mode with 3.6V
input tolerance.
B-port supply voltage. 2.3 V ≤ V_CCB ≤ 5.5 V for SDA_B, SCL_B
Input/output B. Referenced to V_CCB. Allow I2C_SCL configured to 2.5V/3.3V/5V
2
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