SN74LVCZ161284A_08 Datasheet, PDF (2/13 Pages) Texas Instruments – 19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP

SN74LVCZ161284A
19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER
WITH ERROR-FREE POWER UP
SCES358B – SEPTEMBER 2001 – REVISED MAY 2005
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The power-on reset (POR) ensures that the Y outputs (Y9–Y13) stay in the high state after power on until an
associated input (A9–A13) goes high. When an associated input goes high, all Y outputs are activated, and
noninverting signals of the associated inputs are driven through Y outputs. This special feature prevents printer
system errors caused by deasserting the BUSY signal in the cable at power on.
INPUTS
DIR HD
L
L
L
H
H
L
H
H
FUNCTION TABLE
OUTPUT
MODE
Open drain
Totem pole
Totem pole
Open drain
Totem pole
Totem pole
A9–A13 to Y9–Y13 and PERI LOGIC IN to PERI LOGIC OUT
B1–B8 to A1–A8 and C14–C17 to A14–A17
B1–B8 to A1–A8, A9–A13 to Y9–Y13, PERI LOGIC IN to PERI LOGIC OUT, and C14–C17 to A14–A17
A1–A8 to B1–B8, A9–A13 to Y9–Y13, and PERI LOGIC IN to PERI LOGIC OUT
C14–C17 to A14–A17
A1–A8 to B1–B8, A9–A13 to Y9–Y13, C14–C17 to A14–A17, and PERI LOGIC IN to PERI LOGIC OUT
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