SN74LVC2G126 Datasheet, PDF (2/13 Pages) Texas Instruments – DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS

SN74LVC2G126
DUAL BUS BUFFER GATE
WITH 3ĆSTATE OUTPUTS
SCES205H − APRIL 1999 − REVISED SEPTEMBER 2003
description/ordering information (continued)
The SN74LVC2G126 is a dual bus driver/line driver with 3-state outputs. The outputs are disabled when the
associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the
driver.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
H
H
H
H
L
L
L
X
Z
logic diagram (positive logic)
1
1OE
2
1A
7
2OE
5
2A
6
1Y
3
2Y
2
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