SN74LVC1T45_10 Datasheet, PDF (2/25 Pages) Texas Instruments – SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SN74LVC1T45
SCES515I – DECEMBER 2003 – REVISED MAY 2009 ..................................................................................................................................................... www.ti.com
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
T_A
–40°C to 85°C
ORDERING INFORMATION⁽¹⁾
PACKAGE ⁽²⁾
ORDERABLE PART NUMBER
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
SN74LVC1T45YZPR
SOT (SOT-23) – DBV
Reel of 3000
Reel of 250
SN74LVC1T45DBVR
SN74LVC1T45DBVT
SOT (SC-70) – DCK
Reel of 3000
Reel of 250
SN74LVC1T45DCKR
SN74LVC1T45DCKT
SOT (SOT-533) – DRL
Reel of 4000 SN74LVC1T45DRLR
TOP-SIDE MARKING⁽³⁾
_ _ _TA_
CT1_
TA_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE⁽¹⁾
INPUT
DIR
L
H
OPERATION
B data to A bus
A data to B bus
(1) Input circuits of the data I/Os
always are active.
LOGIC DIAGRAM (POSITIVE LOGIC)
DIR ⁵
A3
V_CCA
V_CCB
4
B
2
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