SN74LS224A Datasheet, PDF (2/9 Pages) Texas Instruments – 16 × 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS

SN74LS224A
16 × 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
WITH 3-STATE OUTPUTS
SDLS023C – JANUARY 1991 – REVISED DECEMBER 1999
logic symbol^†
1
OE
9
CLR
3
LDCK
15
UNCK
4
D0
5
D1
6
D2
7
D3
FIFO 16 × 4
CTR
EN5
CT = 0
CT < 16 ^&
2
+ /C1
Z2
3
CT > 0 ^&
–
Z3
&
CT = 0
2 V4
1D
4, 5
2
IR
14
OR
13
Q0
12
Q1
11
Q2
10
Q3
† _{This symbol is in accordance with ANSI/IEEE Standard 91-1984 and IEC Publication 617-12. This symbol is functionally accurate but does}
not show the details of implementation; for these, see the logic diagram. The symbol represents the memory as if it were controlled by a single
counter whose content is the number of words stored at the time. Output data is invalid when the counter content (CT) is 0.
2
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265