SN74CB3Q3384A Datasheet, PDF (2/10 Pages) Texas Instruments – 10 BIT FET BUS SWITCH

SN74CB3Q3384A
10ĆBIT FET BUS SWITCH
2.5ĆV/3.3ĆV LOWĆVOLTAGE HIGHĆBANDWIDTH BUS SWITCH
SCDS114D − DECEMBER 2002 − REVISED NOVEMBER 2003
description/ordering information (continued)
The SN74CB3Q3384A is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage
of the pass transistor, providing a low and flat ON-state resistance (r_on). The low and flat ON-state resistance
allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The
device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data
bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3384A provides an
optimized interface solution ideally suited for broadband communications, networking, and data-intensive
computing systems.
The SN74CB3Q3384A is organized as two 5-bit bus switches with separate output-enable (1OE, 2OE) inputs.
It can be used as two 5-bit bus switches, or as one 10-bit bus switch. When OE is low, the associated 5-bit bus
switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When
OE is high, the associated 5-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry prevents damaging
current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
INPUT
OE
L
H
FUNCTION TABLE
(each 5-bit bus switch)
INPUT/OUTPUT
A
FUNCTION
B
A port = B port
Z
Disconnect
logic diagram (positive logic)
3
1A1
2
SW
1B1
11
1A5
1
1OE
10
SW
1B5
14
2A1
22
2A5
13
2OE
15
SW
2B1
23
SW
2B5
2
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