SN74AVC4T245_10 Datasheet, PDF (2/23 Pages) Texas Instruments – 4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SN74AVC4T245
4-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES576D – JUNE 2004 – REVISED SEPTEMBER 2007
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The V_CC isolation feature ensures that if either V_CC input is at GND, then both ports are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ^{(1) (2)}
ORDERABLE PART NUMBER
QFN – RGY
Tape and reel
SN74AVC4T245RGYR
QFN – RSV
Tape and reel
SN74AVC4T245RSVR
SOIC – D
Tube
Tape and reel
SN74AVC4T245D
SN74AVC4T245DR
TSSOP – PW
Tube
Tape and reel
SN74AVC4T245PW
SN74AVC4T245PWR
TVSOP – DGV
Tape and reel
SN74AVC4T245DGVR
TOP-SIDE MARKING
WT245
2WU
AVC4T245
WT245
WT245
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
FUNCTION TABLE⁽¹⁾
(each 2-bit section)
CONTROL INPUTS
OE
DIR
L
L
L
H
H
X
OUTPUT CIRCUITS
A PORT B PORT
Enabled
Hi-Z
Hi-Z
Enabled
Hi-Z
Hi-Z
OPERATION
B data to A bus
A data to B bus
Isolation
(1) Input circuits of the data I/Os are always active.
LOGIC DIAGRAM (POSITIVE LOGIC) FOR 1/2 OF AVC4T245
DIR
OE
A1
B1
A2
B2
2
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