SN74AVC16722 Datasheet, PDF (2/12 Pages) Texas Instruments – 22-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

SN74AVC16722
22-BIT FLIP-FLOP
WITH 3-STATE OUTPUTS
SCES166H – DECEMBER 1998 – REVISED JUNE 2000
description (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The SN74AVC16722 is characterized for operation from –40°C to 85°C.
terminal assignments
DGG PACKAGE
(TOP VIEW)
OE 1
Q1 2
Q2 3
GND 4
Q3 5
Q4 6
V_CC 7
Q5 8
Q6 9
Q7 10
GND 11
Q8 12
Q9 13
Q10 14
Q11 15
Q12 16
Q13 17
GND 18
Q14 19
Q15 20
Q16 21
V_CC 22
Q17 23
Q18 24
GND 25
Q19 26
Q20 27
V_CC 28
Q21 29
Q22 30
GND 31
NC 32
64 CLK
63 D1
62 D2
61 GND
60 D3
59 D4
58 V_CC
57 D5
56 D6
55 D7
54 GND
53 D8
52 D9
51 D10
50 D11
49 D12
48 D13
47 GND
46 D14
45 D15
44 D16
43 V_CC
42 D17
41 D18
40 GND
39 D19
38 D20
37 V_CC
36 D21
35 D22
34 GND
33 CLKEN
NC – No internal connection
2
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