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SN74AUC1G08_07 Datasheet, PDF (2/14 Pages) Texas Instruments – SINGLE 2-INPUT POSITIVE-AND GATE
SN74AUC1G08
SINGLE 2-INPUT POSITIVE-AND GATE
SCES374O – SEPTEMBER 2001 – REVISED APRIL 2007
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE
INPUTS
A
B
H
H
L
X
X
L
OUTPUT
Y
H
L
L
LOGIC DIAGRAM (POSITIVE LOGIC)
1
A
2
B
4
Y
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage range
VI
Input voltage range(2)
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
VO
Output voltage range(2)
IIK
Input clamp current
VI < 0
IOK
Output clamp current
VO < 0
IO
Continuous output current
Continuous current through VCC or GND
DBV package
DCK package
θJA
Package thermal impedance(3)
DRL package
DRY package
YZP package
Tstg
Storage temperature range
MIN
MAX
–0.5
3.6
–0.5
3.6
–0.5
3.6
–0.5 VCC + 0.5
–50
–50
±20
±100
206
252
142
234
132
–65
150
UNIT
V
V
V
V
mA
mA
mA
mA
°C/W
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
2
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