SN74ALVCHR16269A_08 Datasheet, PDF (2/14 Pages) Texas Instruments – 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS

SN74ALVCHR16269A
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES050O – AUGUST 1995 – REVISED SEPTEMBER 2004
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as
possible, and OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined
by the current-sinking capability of the driver. Due to OE being routed through a register, the active state of the
outputs cannot be determined prior to the arrival of the first clock pulse.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
All outputs are designed to sink up to 12 mA and include equivalent 26-Ω resistors to reduce overshoot and
undershoot.
FUNCTION TABLES
CLK
↑
↑
↑
↑
OUTPUT ENABLE
INPUTS
OEA
H
H
L
L
OEB
H
L
H
L
OUTPUTS
A
1B, 2B
Z
Z
Z
Active
Active
Z
Active
Active
CLKENA1
L
L
L
L
H
H
H
A-TO-B STORAGE (OEB = L)
INPUTS
CLKENA2
H
H
L
L
L
L
H
CLK
↑
↑
↑
↑
↑
↑
X
OUTPUTS
A
1B
2B
L
L
2B₀ ⁽¹⁾
H
H
2B₀ ⁽¹⁾
L
L
L
H
H
H
L
1B₀ ⁽¹⁾
L
H
1B₀ ⁽¹⁾
H
X
1B₀ ⁽¹⁾
2B₀ ⁽¹⁾
(1) Output level before the indicated steady-state input conditions were
established
B-TO-A STORAGE (OEA = L)
INPUTS
CLK
SEL
1B
2B
X
H
X
X
X
L
X
X
↑
H
L
X
↑
H
H
X
↑
L
X
L
↑
L
X
H
OUTPUT
A
A₀ ⁽¹⁾
A₀ ⁽¹⁾
L
H
L
H
(1) Output level before the indicated steady-state input conditions were
established
2