SN74ALVCH16269_07 Datasheet, PDF (2/16 Pages) Texas Instruments – 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS

SN74ALVCH16269
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES019N – JULY 1995 – REVISED JULY 2004
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as
possible, and OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined
by the current-sinking capability of the driver. Due to OE being routed through a register, the active state of the
outputs cannot be determined before the arrival of the first clock pulse.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
GQL OR ZQL PACKAGE
(TOP VIEW)
123456
TERMINAL ASSIGNMENTS
1
2
3
4
5
6
A
A 2B3 OEB1 OEA OEB2 CLKENA2 2B4
B
B 2B1
2B2 GND GND
2B5
2B6
C
C A2
A1
V_CC
V_CC
2B7
2B8
D
D A4
A3
GND GND
2B9
2B10
E
E A6
A5
2B11
2B12
F
F A7
A8
1B11
1B12
G
G A9
A10 GND GND
1B9
1B10
H
H A11
A12
V_CC
V_CC
1B7
1B8
J
J 1B1
1B2 GND GND
1B5
1B6
K 1B3
NC
SEL CLK CLKENA1 1B4
K
2