PCM1750U Datasheet, PDF (2/21 Pages) Texas Instruments – Dual CMOS 18-Bit Monolithic Audio NALOG-TO-DIGITAL CONVERTER

SPECIFICATIONS
ELECTRICAL
At 25°C, and ±V_A = ±5.0V; +V_D = +5.0V, unless otherwise noted. Where relevant, specifications apply to both left and right input/output channels.
PARAMETER
CONDITIONS
PCM1750P, U
MIN
TYP
MAX
UNITS
RESOLUTION
DYNAMIC RANGE
THD + N at –60dB Referred to Full Scale
ANALOG INPUT
Input Range
Input Capacitance
Aperture Delay
Aperture Uncertainty (Jitter)
Full Power Input Bandwidth
DIGITAL INPUT/OUTPUT
Logic Family
Logic Level: V_IH
V_IL
V_OH
V_OL
Output Data Format
Convert Command
Convert Command Pulse Width
Conversion Time
I_IH = ±5µA
I_IL = ±5µA
I_SOURCE = 1.0mA
I_SINK = 3.2mA
Throughput Including Sample/Hold⁽²⁾
DYNAMIC CHARACTERISTICS (20Hz to 24kHz; 4X data decimated to 1X)
Signal-to-Noise Ratio⁽³⁾
Total Harmonic Distortion + N⁽⁷⁾
f_IN = 1kHz (0dB)
f_IN = 1kHz (–20dB)
f_IN = 1kHz (–60dB)
Channel Separation
ACCURACY
Gain Error
Gain Mismatch
BPZ (Bipolar Zero) Error⁽⁸⁾
BPZ Error Mismatch
BPZ Differential Linearity Error⁽⁹⁾
Linearity Error
Warm-up Time
fs = 192kHz⁽⁴⁾; f_IN = 1kHz (0dB)⁽⁵⁾
Without External Adjustments
fs = 192kHz
fs = 192kHz
fs = 192kHz
fs = 192kHz; f_IN = 1kHz (0dB) and 0V
Channel to Channel
Channel to Channel
DRIFT (With Internal Reference)
Gain
Bipolar Zero
0°C to 70°C
0°C to 70°C
DRIFT (Exclusive of Internal Reference)
Gain
Bipolar Zero
0°C to 70°C
0°C to 70°C
REFERENCE
V_REF Output (Pins 19, 24):
Voltage
Current
Impedance
Accuracy
Drift
V_REF Input (Pins 18, P25):
Impedance⁽¹¹⁾
0°C to 70°C
POWER SUPPLY REJECTION
POWER SUPPLY REQUIREMENTS
±V_A Supply Voltage Range
+V_D Supply Voltage Range
+I_A; +I_D Combined Supply Current
–I_A Supply Current
Power Dissipation
TEMPERATURE RANGE
Specification
Operating
Storage
% of V_IN / % of V_SUPPLY ⁽¹²⁾
+V_A; +V_D = +5.0V
–V_A = –5.0V
±V_A = ±5.0V; +V_D = +5.0V
18
+88
+90
±2.75
20
10
50
500
CMOS Compatible
+3.5
–0.3
+V_D + 0.3
+1.5
+2.7
+4.7
+0.2
+0.4
Serial, MSB First, BTC⁽¹⁾
Positive Edge
81
4.5
5.2
20.8
Bits
dB
V
pF
ns
ps_rms
kHz
V
V
V
V
ns
µs
+88
+90
–90
–88
–70
–68
–30
–28
+96
+108
dB⁽⁶⁾
dB
dB
dB
dB
±2
±0.5
±2
±3
±0.002
±0.003
1
±5
±2.0
%
%
mV
mV
% of FSR⁽¹⁰⁾
% of FSR
ms
±50
ppm/°C
±10
ppm of FSR/°C
±10
ppm/°C
±3
ppm of FSR/°C
±4.75
+4.75
0
–40
–60
+2.75
±100
0.2
±25
±50
363 || 120
0.03
±5.00
+5.00
+28
–13
210
±5.25
+5.25
300
+70
+85
+100
V
µA
Ω
mV
ppm/°C
Ω || pF
%/%
V
V
mA
mA
mW
°C
°C
°C
NOTES: (1) Binary Two’s Complement coding. (2) The PCM1750 is tested and guaranteed at 5.2µs, however it will operate at 4.5µs. The dynamic performance is not
guaranteed or tested at this conversion rate. (3) Ratio of Signal_RMS / (Distortion_RMS + Noise_RMS). (4) A/D converter sample frequency (4 x 48kHz; 4X oversampling per
channel). (5) A/D converter input frequency (signal level). (6) Referred to input signal level. (7) Ratio of (Distortion_RMS + Noise_RMS) / Signal_RMS. (8) Externally adjustable
to zero error. (9) Differential non-linearity error at bipolar major carry input code. Externally adjustable to zero error. (10) Full scale range (5.50V). (11) Refer to equivalent
circuit in Figure 1. (12) Worst case operating condition. Refer to typical performance curves.
®
PCM1750
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